Patents by Inventor Adriaan De Lind Van Wijngaarden
Adriaan De Lind Van Wijngaarden has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11764902Abstract: Various example embodiments for supporting forward error correction (FEC) in a communication system are presented. Various example embodiments for supporting FEC in a communication system may include the selection of a FEC setting for a communication channel from a transmitter to a receiver, e.g., the selection of a FEC setting for a communication channel, the selection of a FEC setting for a data burst sent over a communication channel, the selection of a FEC setting for a portion of a data burst sent over a communication channel, switching between FEC settings for different portions of a data burst over a communication channel, or the like, as well as various combinations thereof.Type: GrantFiled: September 9, 2021Date of Patent: September 19, 2023Assignee: Nokia Solutions and Networks OyInventors: Yannick Lefevre, Adriaan de Lind van Wijngaarden, Jochen Maes, Vincent Houtsma, Doutje Van Veen, Amitkumar Mahadevan, Michaël Fivez
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Patent number: 11580285Abstract: An electrical device comprising a reconfigurable integrated circuit that includes paired top electrodes and bottom electrodes separated from each other by an active layer.Type: GrantFiled: December 8, 2017Date of Patent: February 14, 2023Assignees: Nokia of America Corporation, Nokia Solutions and Networks OyInventors: Evgeny Zamburg, Adriaan De Lind Van Wijngaarden, Dusan Suvakovic
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Publication number: 20220123863Abstract: Various example embodiments for supporting forward error correction (FEC) in a communication system are presented. Various example embodiments for supporting FEC in a communication system may include the selection of a FEC setting for a communication channel from a transmitter to a receiver, e.g., the selection of a FEC setting for a communication channel, the selection of a FEC setting for a data burst sent over a communication channel, the selection of a FEC setting for a portion of a data burst sent over a communication channel, switching between FEC settings for different portions of a data burst over a communication channel, or the like, as well as various combinations thereof.Type: ApplicationFiled: September 9, 2021Publication date: April 21, 2022Inventors: Yannick Lefevre, Adriaan de Lind van Wijngaarden, Jochen Maes, Vincent Houtsma, Doutje Van Veen, Amitkumar Mahadevan, Michaël Fivez
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Patent number: 10812606Abstract: Various example embodiments for supporting communications for stream processing platforms are described. Various example embodiments for supporting communications in a stream processing platform may be configured to use micro-brokers to support communications in a stream processing platform by providing micro-brokers configured to support communications between operators of operator groups of the stream processing platform. Various example embodiments for supporting communications in a stream processing platform may be configured to use micro-brokers to support communications in the stream processing platform by providing micro-brokers configured to support communications between operators of operator groups of the stream processing platform using various communication modes (e.g.Type: GrantFiled: August 28, 2018Date of Patent: October 20, 2020Assignee: Nokia Solutions and Networks OyInventors: Mauricio Cortes, Adriaan de Lind van Wijngaarden
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Publication number: 20200226314Abstract: An electrical device comprising a reconfigurable integrated circuit that includes paired top electrodes and bottom electrodes separated from each other by an active layer.Type: ApplicationFiled: December 8, 2017Publication date: July 16, 2020Inventors: Evgeny Zamburg, Adriaan De Lind Van Wijngaarden, Dusan Suvakovic
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Patent number: 10686445Abstract: An electrical system comprising a circuit of reconfigurable electrical devices and a controller including a processor. The processor has a configuration examiner and a state modifier. The configuration examiner is configured to determine a configuration for the circuit of reconfigurable electrical devices based upon a connection input. The state modifier is configured to modify, based on the configuration, the circuit by changing a resistance state of the reconfigurable electrical devices. A controller for reconfigurable electrical devices and a method of controlling reconfigurable electrical devices of a circuit are also described.Type: GrantFiled: December 8, 2017Date of Patent: June 16, 2020Assignees: Nokia of America Corporation, Nokia Solutions and Networks OyInventors: Evgeny Zamburg, Adriaan De Lind Van Wijngaarden, Dusan Suvakovic
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Publication number: 20200076912Abstract: Various example embodiments for supporting communications for stream processing platforms are described. Various example embodiments for supporting communications in a stream processing platform may be configured to use micro-brokers to support communications in a stream processing platform by providing micro-brokers configured to support communications between operators of operator groups of the stream processing platform. Various example embodiments for supporting communications in a stream processing platform may be configured to use micro-brokers to support communications in the stream processing platform by providing micro-brokers configured to support communications between operators of operator groups of the stream processing platform using various communication modes (e.g.Type: ApplicationFiled: August 28, 2018Publication date: March 5, 2020Inventors: Mauricio Cortes, Adriaan de Lind van Wijngaarden
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Publication number: 20200067510Abstract: An electrical system comprising a circuit of reconfigurable electrical devices and a controller including a processor. The processor has a configuration examiner and a state modifier. The configuration examiner is configured to determine a configuration for the circuit of reconfigurable electrical devices based upon a connection input. The state modifier is configured to modify, based on the configuration, the circuit by changing a resistance state of the reconfigurable electrical devices. A controller for reconfigurable electrical devices and a method of controlling reconfigurable electrical devices of a circuit are also described.Type: ApplicationFiled: December 8, 2017Publication date: February 27, 2020Inventors: Evgeny Zamburg, Adriaan De Lind Van Wijngaarden, Dusan Suvakovic
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Patent number: 9673860Abstract: In accordance with an embodiment, the method includes inserting a plurality of crosstalk probing signals within the wired multi-carrier communication system for probing the crosstalk from respective ones of the plurality of disturber lines into the victim line, carrying out crosstalk measurements over the victim line, and estimating the crosstalk coefficients from the crosstalk measurements. The method further includes organizing the plurality of disturber lines into subsets of disturber lines, and individually assigning disjoint groups of carriers to the respective subsets of disturber lines. The insertion of the plurality of crosstalk probing signals is confined within the respectively assigned groups of carriers. The subsets of disturber lines and/or the groups of carriers used for a second or subsequent iteration are tailored based on crosstalk characteristics observed for the respective disturber lines during a pervious iteration.Type: GrantFiled: July 18, 2013Date of Patent: June 6, 2017Assignee: Alcatel LucentInventors: Adriaan De Lind Van Wijngaarden, Mamoun Guenach, Carl J. Nuzman
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Patent number: 9100506Abstract: In one embodiment, the line termination card includes a data output terminal configured to output a data sequence. The card further includes a vectoring entity configured to parse and encode the data sequence into frequency samples according to a carrier loading parameter, configured to scale the frequency samples into scaled frequency samples according to a carrier scaling parameter, and, configured to process the scaled frequency samples for crosstalk compensation. A controller is configured to adjust the carrier loading parameter and the carrier scaling parameter, and a forwarder is coupled to the data output terminal and to the controller. The forwarder is configured to forward the data sequence, the carrier loading parameter and the carrier scaling parameter towards a further line termination card.Type: GrantFiled: June 10, 2010Date of Patent: August 4, 2015Assignee: Alcatel LucentInventors: Hungkei Chow, Adriaan De Lind Van Wijngaarden, Michael Peeters, Dirk Vanderhaegen
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Publication number: 20150195005Abstract: In accordance with an embodiment, the method includes inserting a plurality of crosstalk probing signals within the wired multi-carrier communication system for probing the crosstalk from respective ones of the plurality of disturber lines into the victim line, carrying out crosstalk measurements over the victim line, and estimating the crosstalk coefficients from the crosstalk measurements. The method further includes organizing the plurality of disturber lines into subsets of disturber lines, and individually assigning disjoint groups of carriers to the respective subsets of disturber lines. The insertion of the plurality of crosstalk probing signals is confined within the respectively assigned groups of carriers. The subsets of disturber lines and/or the groups of carriers used for a second or subsequent iteration are tailored based on crosstalk characteristics observed for the respective disturber lines during a pervious iteration.Type: ApplicationFiled: July 18, 2013Publication date: July 9, 2015Inventors: Adriaan De Lind Van Wijngaarden, Mamoun Guenach, Carl Nuzman
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Publication number: 20120057693Abstract: In one embodiment, the line termination card includes a data output terminal configured to output a data sequence. The card further includes a vectoring entity configured to parse and encode the data sequence into frequency samples according to a carrier loading parameter, configured to scale the frequency samples into scaled frequency samples according to a carrier scaling parameter, and, configured to process the scaled frequency samples for crosstalk compensation. A controller is configured to adjust the carrier loading parameter and the carrier scaling parameter, and a forwarder is coupled to the data output terminal and to the controller. The forwarder is configured to forward the data sequence, the carrier loading parameter and the carrier scaling parameter towards a further line termination card.Type: ApplicationFiled: June 10, 2010Publication date: March 8, 2012Applicant: ALCATEL LUCENTInventors: Hungkei Chow, Adriaan De Lind Van Wijngaarden, Michael Peeters, Dirk Vanderhaegen
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Publication number: 20060067369Abstract: A method and apparatus for frame synchronization in digital communication systems using multiple modulation formats perform a search for a differential frame alignment sequence (FAS) to frame-align the received digital stream and determine the polarity of the stream. Embodiments of the invention are compatible with Differential Phase Shift Keying (DPSK), Duobinary Signaling (DBS), and ON/OFF Keying (OOK) modulation formats.Type: ApplicationFiled: September 30, 2004Publication date: March 30, 2006Inventors: Raul Benet Ballester, Adriaan De Lind Van Wijngaarden, Ralf Dohmen
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Publication number: 20050262402Abstract: Bit error patterns for high speed data systems are generated by randomly distributing a first error pattern of G bits, output from a group of substantially uncorrelated bit error generators, into a second error pattern of N bits, where G and N are integers and G is less than or equal to N. In one embodiment, G bit error generators produce a G bit error pattern per bit period. Each bit error generator operates at a prescribed bit error rate. A distribution element randomly rearranges the order and placement of the G bits produced during a single bit period within an N bit grouping. The N bit group corresponds to N consecutive bits of data with which the error bits can be combined. Each bit error generator can be realized by a linear feedback shift register or its equivalent. Different primitive polynomials and different lengths can be used for each linear feedback shift register. In addition, outputs from fewer than all the shift register stages are utilized to generate each error bit.Type: ApplicationFiled: May 18, 2004Publication date: November 24, 2005Inventors: Raul Ballester, Adriaan De Lind Van Wijngaarden, Ralf Dohmen, Bernd Dotterweich, Swen Wunderlich