Abstract: A data processor comprises storage (e.g., registers) for each of first, second and third values, a processor condition register for processor condition codes, and logic for decoding instructions including a specific instruction defining an operation between the first value and either the second value or the third value, the selection of the second or the third value being made by the processor in dependence on the state of said processor condition code. The invention is of particular, but not exclusive, application for the plotting of lines in a display system. In an example of a display system incorporating such a data processor, a pixel can be plotted on each processor instruction cycle.