Abstract: A gain control circuit arrangement comprises a transistor amplifier (A) for providing an output signal (OP) in response to a received input signal (IP). The gain of the transistor amplifier (A) is controlled by means of a field effect transistor (TF) connected in the emitter circuit of the amplifier and included in a feedback control loop to which a gain control signal (Ref A) is applied in operation of the gain control arrangement. A collector load of the amplifier comprises a potential divider (R1 and R2) one portion of which is shunted by a control loop which serves to maintain constant the collector current passing through the transistor amplifier.