Patents by Inventor Adrian Kiermasz
Adrian Kiermasz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9995783Abstract: A method and apparatus for extracting the contents of voids and/or pores present in a semiconductor device to obtain information indicative of the nature of the voids and/or pores, e.g. to assist with metrology measurements. The method includes heating the semiconductor wafer to expel the contents of the voids and/or pores, collecting the expelled material in a collector, and measuring a consequential change in mass of the semiconductor wafer and/or the collector, to extract information indicative of the nature of the voids. This information may include information relating to the distribution of the voids and/or pores, and/or the sizes of the voids and/or pores, and/or the chemical contents of the voids and/or pores. The collector may include a condenser having a temperature-controlled surface (e.g. in thermal communication with a refrigeration unit) for condensing the expelled material.Type: GrantFiled: June 28, 2016Date of Patent: June 12, 2018Assignee: METRYX LIMITEDInventor: Adrian Kiermasz
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Patent number: 9903750Abstract: A method of determining information relating to the mass of a semiconductor wafer is disclosed. The method comprises loading the semiconductor wafer on to a measurement area of a weighing device having weight compensation means arranged to compensate for a predetermined weight loaded on to the measurement area; generating measurement output indicative of a difference between the weight of the semiconductor wafer and the predetermined weight; and using the measurement output to determine information relating to the mass of the semiconductor wafer. Also discloses is a corresponding weighing device for determining information relating to the mass of a semiconductor wafer.Type: GrantFiled: August 21, 2014Date of Patent: February 27, 2018Assignee: METRYX LTD.Inventors: Robert John Wilby, Adrian Kiermasz
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Patent number: 9818658Abstract: A semiconductor wafer processing method comprising controlling the temperature of a semiconductor wafer to be within a predetermined processing temperature range by: causing a first temperature change of the semiconductor wafer using a first temperature changing unit; and subsequently causing a second temperature change using a second temperature changing unit; wherein the first change is greater than the second change; and subsequently loading the semiconductor wafer on a processing area of a semiconductor wafer processing apparatus.Type: GrantFiled: November 3, 2014Date of Patent: November 14, 2017Assignee: METRYX LIMITEDInventors: Robert John Wilby, Adrian Kiermasz
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Publication number: 20170115158Abstract: A semiconductor wafer weighing apparatus comprises: a weight force measuring device for measuring a weight force of a semiconductor wafer; and control means configured to control an operation of the apparatus based on detection of acceleration of the apparatus or of a semiconductor wafer loaded on the apparatus by a detector for detecting acceleration of the apparatus or of a semiconductor wafer loaded on the apparatus; wherein: the control means is arranged to determine an error in the output of the weight force measuring device caused by an acceleration of the apparatus or of a semiconductor wafer loaded on the apparatus, using a predetermined relationship that matches the error in the output of the weight force measuring device to acceleration of the apparatus or of a semiconductor wafer loaded on the apparatus for different accelerations of the apparatus or of a semiconductor wafer loaded on the apparatus.Type: ApplicationFiled: March 23, 2015Publication date: April 27, 2017Applicant: METRYX LIMITEDInventors: Robert John WILBY, Adrian KIERMASZ
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Publication number: 20170005019Abstract: A semiconductor wafer processing method comprising controlling the temperature of a semiconductor wafer to be within a predetermined processing temperature range by: causing a first temperature change of the semiconductor wafer using a first temperature changing unit; and subsequently causing a second temperature change using a second temperature changing unit; wherein the first change is greater than the second change; and subsequently loading the semiconductor wafer on a processing area of a semiconductor wafer processing apparatus.Type: ApplicationFiled: November 3, 2014Publication date: January 5, 2017Applicant: METRYX LIMITEDInventors: Robert John WILBY, Adrian KIERMASZ
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Publication number: 20160306004Abstract: A method and apparatus for extracting the contents of voids and/or pores present in a semiconductor device to obtain information indicative of the nature of the voids and/or pores, e.g. to assist with metrology measurements. The method includes heating the semiconductor wafer to expel the contents of the voids and/or pores, collecting the expelled material in a collector, and measuring a consequential change in mass of the semiconductor wafer and/or the collector, to extract information indicative of the nature of the voids. This information may include information relating to the distribution of the voids and/or pores, and/or the sizes of the voids and/or pores, and/or the chemical contents of the voids and/or pores. The collector may include a condenser having a temperature-controlled surface (e.g. in thermal communication with a refrigeration unit) for condensing the expelled material.Type: ApplicationFiled: June 28, 2016Publication date: October 20, 2016Inventor: Adrian KIERMASZ
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Patent number: 9423447Abstract: A method and apparatus for extracting the contents (39) of voids (13) and/or pores present in a semiconductor device to obtain information indicative of the nature of the voids and/or pores, e.g. to assist with metrology measurements. The method includes heating the semiconductor wafer to expel the contents of the voids and/or pores, collecting the expelled material (41) in a collector, and measuring a consequential change in mass of the semiconductor wafer (29) and/or the collector (37), to extract information indicative of the nature of the voids. This information may include information relating to the distribution of the voids and/or pores, and/or the sizes of the voids and/or pores, and/or the chemical contents of the voids and/or pores. The collector may include a condenser having a temperature-controlled surface (e.g. in thermal communication with a refrigeration unit) for condensing the expelled material.Type: GrantFiled: April 5, 2012Date of Patent: August 23, 2016Assignee: METRYX LIMITEDInventor: Adrian Kiermasz
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Publication number: 20160195424Abstract: A method of determining information relating to the mass of a semiconductor wafer is disclosed. The method comprises loading the semiconductor wafer on to a measurement area of a weighing device having weight compensation means arranged to compensate for a predetermined weight loaded on to the measurement area; generating measurement output indicative of a difference between the weight of the semiconductor wafer and the predetermined weight; and using the measurement output to determine information relating to the mass of the semiconductor wafer. Also discloses is a corresponding weighing device for determining information relating to the mass of a semiconductor wafer.Type: ApplicationFiled: August 21, 2014Publication date: July 7, 2016Applicant: METRYX LIMITEDInventors: Robert John WILBY, Adrian KIERMASZ
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Publication number: 20140015557Abstract: A method and apparatus for extracting the contents (39) of voids (13) and/or pores present in a semiconductor device to obtain information indicative of the nature of the voids and/or pores, e.g. to assist with metrology measurements. The method includes heating the semiconductor wafer to expel the contents of the voids and/or pores, collecting the expelled material (41) in a collector, and measuring a consequential change in mass of the semiconductor wafer (29) and/or the collector (37), to extract information indicative of the nature of the voids. This information may include information relating to the distribution of the voids and/or pores, and/or the sizes of the voids and/or pores, and/or the chemical contents of the voids and/or pores. The collector may include a condenser having a temperature-controlled surface (e.g. in thermal communication with a refrigeration unit) for condensing the expelled material.Type: ApplicationFiled: April 5, 2012Publication date: January 16, 2014Applicant: METRYX LIMITEDInventor: Adrian Kiermasz
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Patent number: 8594827Abstract: A semiconductor wafer fabrication metrology method in which process steps are characterised by a change in wafer mass, whereby during fabrication mass is used as a measurable parameter to implement statistical process control on the one or more of process steps. In one aspect, the shape of a measured mass distribution is compared with the shape of a predetermined characteristic mass distribution to monitor the process. An determined empirical relationship between a control variable of the process and the characteristic mass change may enable differences between the measured mass distribution and characteristic mass distribution to provide information about the control variable. In another aspect, the relative position of an individual measured wafer mass change in a current distribution provides information about individual wafer problems independently from general process problems.Type: GrantFiled: December 19, 2012Date of Patent: November 26, 2013Assignee: Metryx LimitedInventor: Adrian Kiermasz
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Patent number: 8364302Abstract: A semiconductor wafer fabrication metrology method in which process steps are characterized by a change in wafer mass, whereby during fabrication mass is used as a measurable parameter to implement statistical process control on the one or more of process steps. In one aspect, the shape of a measured mass distribution is compared with the shape of a predetermined characteristic mass distribution to monitor the process. An determined empirical relationship between a control variable of the process and the characteristic mass change may enable differences between the measured mass distribution and characteristic mass distribution to provide information about the control variable. In another aspect, the relative position of an individual measured wafer mass change in a current distribution provides information about individual wafer problems independently from general process problems.Type: GrantFiled: January 7, 2009Date of Patent: January 29, 2013Assignee: Metryx LimitedInventor: Adrian Kiermasz
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Patent number: 8200353Abstract: Measuring apparatus and method for monitoring fabrication of a semiconductor wafer by exciting and measuring vibrations of the wafer substrate. A measurable parameter of vibration (e.g. frequency) is indicative of mass of a vibrating region. Mass change caused by wafer treatment is reflected in changes in vibration measurements taken before and after that treatment. The apparatus includes a wafer support e.g. projecting ledge (19), a vibration exciting device e.g. contact probe (28) or pressure differential applicator, and a measurement device e.g. frequency sensor (62).Type: GrantFiled: March 4, 2008Date of Patent: June 12, 2012Assignee: Metryx LimitedInventors: Robert John Wilby, Adrian Kiermasz
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Patent number: 8200447Abstract: Measuring apparatus for monitoring the position of the center of mass of a semiconductor wafer is disclosed. The apparatus includes a wafer support (14) with a ledge for supporting an edge of a wafer (2) when it is lifted at a detection point by a probe (16). The probe (16) is connected to a force sensor (18) which senses a force due to a moment of the wafer about a fulcrum (4) on the wafer support (14). Moment measurements are taken at a plurality of detection points and a processing unit calculates the position of the center of mass from the moment measurements. Changes in wafer mass distribution (e.g. due to faulty treatment steps) which cause movement of the center of mass can be detected.Type: GrantFiled: January 18, 2011Date of Patent: June 12, 2012Assignee: Metryx LimitedInventors: Robert John Wilby, Adrian Kiermasz
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Publication number: 20110190919Abstract: A semiconductor wafer fabrication metrology method in which process steps are characterised by a change in wafer mass, whereby during fabrication mass is used as a measurable parameter to implement statistical process control on the one or more of process steps. In one aspect, the shape of a measured mass distribution is compared with the shape of a predetermined characteristic mass distribution to monitor the process. An determined empirical relationship between a control variable of the process and the characteristic mass change may enable differences between the measured mass distribution and characteristic mass distribution to provide information about the control variable. In another aspect, the relative position of an individual measured wafer mass change in a current distribution provides information about individual wafer problems independently from general process problems.Type: ApplicationFiled: January 7, 2009Publication date: August 4, 2011Inventor: Adrian Kiermasz
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Publication number: 20110119009Abstract: Measuring apparatus for monitoring the position of the centre of mass of a semiconductor wafer is disclosed. The apparatus includes a wafer support (14) with a ledge for supporting an edge of a wafer (2) when it is lifted at a detection point by a probe (16). The probe (16) is connected to a force sensor (18) which senses a force due to a moment of the wafer about a fulcrum (4) on the wafer support (14). Moment measurements are taken at a plurality of detection points and a processing unit calculates the position of the centre of mass from the moment measurements. Changes in wafer mass distribution (e.g. due to faulty treatment steps) which cause movement of the centre of mass can be detected.Type: ApplicationFiled: January 18, 2011Publication date: May 19, 2011Inventors: Robert John Wilby, Adrian KIERMASZ
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Patent number: 7892863Abstract: Measuring apparatus for monitoring the position of the center of mass of a semiconductor wafer is disclosed. The apparatus includes a wafer support (14) with a ledge for supporting an edge of a wafer (2) when it is lifted at a detection point by a probe (16). The probe (16) is connected to a force sensor (18) which senses a force due to a moment of the wafer about a fulcrum (4) on the wafer support (14). Moment measurements are taken at a plurality of detection points and a processing unit calculates the position of the center of mass from the moment measurements. Changes in wafer mass distribution (e.g. due to faulty treatment steps) which cause movement of the center of mass can be detected.Type: GrantFiled: October 8, 2007Date of Patent: February 22, 2011Assignee: Metryx LimitedInventors: Robert John Wilby, Adrian Kiermasz
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Publication number: 20100147078Abstract: Measuring apparatus and method for monitoring fabrication of a semiconductor wafer by exciting and measuring vibrations of the wafer substrate. A measurable parameter of vibration (e.g. frequency) is indicative of mass of a vibrating region. Mass change caused by wafer treatment is reflected in changes in vibration measurements taken before and after that treatment. The apparatus includes a wafer support e.g. projecting ledge (19), a vibration exciting device e.g. contact probe (28) or pressure differential applicator, and a measurement device e.g. frequency sensor (62).Type: ApplicationFiled: March 4, 2008Publication date: June 17, 2010Inventors: Robert John Wilby, Adrian Kiermasz
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Patent number: 7459100Abstract: In a plasma processing system, a method for optimizing etching of a substrate is disclosed. The method includes selecting a first plasma process recipe including a first process variable, wherein changing the first process variable by a first amount optimizes a first substrate etch characteristic and aggravates a second substrate etch characteristic. The method also includes selecting second plasma process recipe including a second process variable, wherein changing the second process variable by a second amount aggravates the first substrate etch characteristic and optimizes the second substrate etch characteristic. The method further includes positioning a substrate on a chuck in a plasma processing chamber; and striking a plasma within the plasma processing chamber.Type: GrantFiled: December 22, 2004Date of Patent: December 2, 2008Assignee: Lam Research CorporationInventors: Adrian Kiermasz, Tamarak Pandhumsoporn, Alferd Cofer
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Publication number: 20080087106Abstract: Measuring apparatus for monitoring the position of the centre of mass of a semiconductor wafer is disclosed. The apparatus includes a wafer support (14) with a ledge for supporting an edge of a wafer (2) when it is lifted at a detection point by a probe (16). The probe (16) is connected to a force sensor (18) which senses a force due to a moment of the wafer about a fulcrum (4) on the wafer support (14). Moment measurements are taken at a plurality of detection points and a processing unit calculates the position of the centre of mass from the moment measurements. Changes in wafer mass distribution (e.g. due to faulty treatment steps) which cause movement of the centre of mass can be detected.Type: ApplicationFiled: October 8, 2007Publication date: April 17, 2008Inventors: Robert John Wilby, Adrian Kiermasz
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Patent number: 7086936Abstract: A linear chemical mechanical planarization (CMP) belt pad includes a first portion comprised of a first pad material, e.g., polyurethane, and a second portion comprised of a second pad material, e.g., porous rubber. The first portion has a first end and a second end. The second portion is situated between the first and second ends of the first portion and extends substantially across a width of the belt pad. Alternatively, the second portion may be embedded in the first portion such that a peripheral surface of the second portion is surrounded by a surface of the first portion. A linear CMP system and a method for planarizing a wafer in a single linear CMP module also are described.Type: GrantFiled: December 22, 2003Date of Patent: August 8, 2006Assignee: Lam Research CorporationInventor: Adrian Kiermasz