Patents by Inventor Adrian Li

Adrian Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250131335
    Abstract: Implementations disclosed herein relate to utilizing at least one existing manually engineered policy, for a robotic task, in training an RL policy model that can be used to at least selectively replace a portion of the engineered policy. The RL policy model can be trained for replacing a portion of a robotic task and can be trained based on data from episodes of attempting performance of the robotic task, including episodes in which the portion is performed based on the engineered policy and/or other portion(s) are performed based on the engineered policy. Once trained, the RL policy model can be used, at least selectively and in lieu of utilization of the engineered policy, to perform the portion of robotic task, while other portion(s) of the robotic task are performed utilizing the engineered policy and/or other similarly trained (but distinct) RL policy model(s).
    Type: Application
    Filed: December 23, 2024
    Publication date: April 24, 2025
    Inventors: Adrian Li, Benjamin Holson, Alexander Herzog, Mrinal Kalakrishnan
  • Publication number: 20250096069
    Abstract: A power module includes a substrate, one or more semiconductor dies mounted to the substrate, a first external power connection electrically connected to a first power terminal of at least one of the one or more semiconductor dies, and an encapsulant at least partially encapsulating the first external power connection. A portion of the first external power connection and at least parts of an outer surface of the substrate are exposed from the encapsulant. A heatsink is mounted to the first external power connection.
    Type: Application
    Filed: August 27, 2024
    Publication date: March 20, 2025
    Inventors: Adrian Lis, Thomas Schmid, Ewald Günther
  • Patent number: 12224222
    Abstract: A semiconductor package includes: a first substrate having a first metallized side; a semiconductor die attached to the first metallized side of the first substrate at a first side of the die, a second side of the die opposite the first side being covered by a passivation, the passivation having a first opening that exposes at least part of a first pad at the second side of the die; a thermally and electrically conductive spacer attached to the part of the first pad that is exposed by the first opening in the passivation, the spacer at least partly overhanging the passivation along at least one side face of the semiconductor die; a second substrate having a first metallized side attached to the spacer at an opposite side of the spacer as the semiconductor die; and an encapsulant encapsulating the semiconductor die and the spacer. Additional spacer embodiments are described.
    Type: Grant
    Filed: January 11, 2022
    Date of Patent: February 11, 2025
    Assignee: Infineon Technologies AG
    Inventors: Christian Neugirg, Adrian Lis, Peter Scherl, Ewald Guenther
  • Patent number: 12210943
    Abstract: Implementations disclosed herein relate to utilizing at least one existing manually engineered policy, for a robotic task, in training an RL policy model that can be used to at least selectively replace a portion of the engineered policy. The RL policy model can be trained for replacing a portion of a robotic task and can be trained based on data from episodes of attempting performance of the robotic task, including episodes in which the portion is performed based on the engineered policy and/or other portion(s) are performed based on the engineered policy. Once trained, the RL policy model can be used, at least selectively and in lieu of utilization of the engineered policy, to perform the portion of robotic task, while other portion(s) of the robotic task are performed utilizing the engineered policy and/or other similarly trained (but distinct) RL policy model(s).
    Type: Grant
    Filed: January 29, 2021
    Date of Patent: January 28, 2025
    Assignee: GOOGLE LLC
    Inventors: Adrian Li, Benjamin Holson, Alexander Herzog, Mrinal Kalakrishnan
  • Patent number: 12183667
    Abstract: A semiconductor package includes a first power electronics carrier including a structured metallization layer disposed on an electrically insulating substrate, a power semiconductor die mounted on the first power electronics carrier, and a first pair of metal pads that are immediately laterally adjacent one another and are low-voltage difference nodes of the semiconductor package, a second pair of metal pads that are immediately laterally adjacent one another and are high-voltage difference nodes of the semiconductor package, and an encapsulant body of electrically insulating material that encapsulates the power semiconductor die and the first and second pairs of metal pads, wherein the first pair of the metal pads are laterally isolated from one another by a first minimum separation distance, and wherein the second pair of the metal pads are laterally isolated from one another by a second minimum separation distance that is greater than the first minimum separation distance.
    Type: Grant
    Filed: January 20, 2022
    Date of Patent: December 31, 2024
    Assignee: Infineon Technologies AG
    Inventors: Peter Scherl, Adrian Lis, Christian Neugirg
  • Publication number: 20240413118
    Abstract: A power module is disclosed herein. In one embodiment, the power modules includes a solder repellent structure that adjoins a metallic surface of a substrate outside a perimeter of an electronic component attached to the metallic surface of the substrate and positioned adjacent to one or more sides of the electronic component, the solder repellent structure being configured to repel molten solder. In another embodiment, the power modules includes a solder wetting structure that adjoins a metallic surface of a substrate outside a perimeter of an electronic component attached to the metallic surface of the substrate and positioned adjacent to one or more sides of the electronic component, where excess solder adheres to the solder wetting structure.
    Type: Application
    Filed: June 12, 2023
    Publication date: December 12, 2024
    Inventors: Peter Scherl, Adrian Lis
  • Patent number: 12113000
    Abstract: A semiconductor package includes a first semiconductor die, an encapsulant body of electrically insulating mold compound that encapsulates the first semiconductor die, a plurality of power leads that protrude out of the encapsulant body and form power connections with the first semiconductor die, and a signal lead that protrudes out of the encapsulant body and forms a signal connection with the first semiconductor die, wherein the signal lead comprises a lead adapter retention feature that is configured to form an interlocked connection with a lead adapter that is fitted over an outer end of the signal lead.
    Type: Grant
    Filed: December 2, 2021
    Date of Patent: October 8, 2024
    Assignee: Infineon Technologies AG
    Inventors: Ajay Poonjal Pai, Tino Karczewski, Adrian Lis
  • Publication number: 20240304527
    Abstract: A power module includes: a first substrate comprising a patterned first metallization; a second substrate comprising a patterned second metallization that faces the patterned first metallization; a first plurality of vertical power transistor dies having a drain pad attached to a first part of the patterned first metallization and a source pad electrically connected to a first part of the patterned second metallization; a second plurality of vertical power transistor dies having a drain pad attached to a second part of the patterned first metallization and a source pad electrically connected to a second part of the patterned second metallization; and a multi-level lead frame between the first substrate and the second substrate and attached to each of the first part of the patterned first metallization, the first part of the patterned second metallization, the second part of the patterned first metallization, and the second part of the patterned second metallization.
    Type: Application
    Filed: January 30, 2024
    Publication date: September 12, 2024
    Inventors: Dominic Raithel, Adrian Lis, Thomas Schmid
  • Patent number: 12062589
    Abstract: One example of a semiconductor package includes a first substrate, a second substrate, a semiconductor die, and a spacer. The semiconductor die is attached to the first substrate. The spacer is attached to the semiconductor die and attached to the second substrate via solder. A surface of the second substrate facing the spacer includes a plurality of recesses extending from proximate at least one edge of the spacer to contain a portion of the solder.
    Type: Grant
    Filed: June 29, 2021
    Date of Patent: August 13, 2024
    Assignee: Infineon Technologies AG
    Inventors: Adrian Lis, Michael Ledutke
  • Patent number: 12049004
    Abstract: Methods and apparatus related to receiving a request that includes robot instructions and/or environmental parameters, operating each of a plurality of robots based on the robot instructions and/or in an environment configured based on the environmental parameters, and storing data generated by the robots during the operating. In some implementations, at least part of the stored data that is generated by the robots is provided in response to the request and/or additional data that is generated based on the stored data is provided in response to the request.
    Type: Grant
    Filed: January 30, 2023
    Date of Patent: July 30, 2024
    Assignee: GOOGLE LLC
    Inventors: Peter Pastor Sampedro, Mrinal Kalakrishnan, Ali Yahya Valdovinos, Adrian Li, Kurt Konolige, Vincent Dureau
  • Publication number: 20240047429
    Abstract: A power module includes: a first substrate having a patterned first metallization; a second substrate vertically aligned with the first substrate and having a patterned second metallization that faces the patterned first metallization; first vertical power transistor dies having a drain pad attached to a first island of the patterned first metallization and a source pad electrically connected to a first island of the patterned second metallization via first spacers; and second vertical power transistor dies having a source pad electrically connected to the first island of the patterned first metallization via second spacers. A first subset of the second vertical power transistor dies has a drain pad attached to a second island of the patterned second metallization. A second subset of the second vertical power transistor dies has a drain pad attached to a third island of the patterned second metallization. A method of producing the module is described.
    Type: Application
    Filed: August 5, 2022
    Publication date: February 8, 2024
    Inventors: Adrian Lis, Ewald Guenther, Thomas Schmid
  • Publication number: 20230245968
    Abstract: A semiconductor package includes a first power electronics carrier including a structured metallization layer disposed on an electrically insulating substrate, a power semiconductor die mounted on the first power electronics carrier, and a first pair of metal pads that are immediately laterally adjacent one another and are low-voltage difference nodes of the semiconductor package, a second pair of metal pads that are immediately laterally adjacent one another and are high-voltage difference nodes of the semiconductor package, and an encapsulant body of electrically insulating material that encapsulates the power semiconductor die and the first and second pairs of metal pads, wherein the first pair of the metal pads are laterally isolated from one another by a first minimum separation distance, and wherein the second pair of the metal pads are laterally isolated from one another by a second minimum separation distance that is greater than the first minimum separation distance.
    Type: Application
    Filed: January 20, 2022
    Publication date: August 3, 2023
    Inventors: Peter Scherl, Adrian Lis, Christian Neugirg
  • Publication number: 20230223312
    Abstract: A semiconductor package includes: a first substrate having a first metallized side; a semiconductor die attached to the first metallized side of the first substrate at a first side of the die, a second side of the die opposite the first side being covered by a passivation, the passivation having a first opening that exposes at least part of a first pad at the second side of the die; a thermally and electrically conductive spacer attached to the part of the first pad that is exposed by the first opening in the passivation, the spacer at least partly overhanging the passivation along at least one side face of the semiconductor die; a second substrate having a first metallized side attached to the spacer at an opposite side of the spacer as the semiconductor die; and an encapsulant encapsulating the semiconductor die and the spacer. Additional spacer embodiments are described.
    Type: Application
    Filed: January 11, 2022
    Publication date: July 13, 2023
    Inventors: Christian Neugirg, Adrian Lis, Peter Scherl, Ewald Guenther
  • Publication number: 20230178460
    Abstract: A semiconductor package includes a first semiconductor die, an encapsulant body of electrically insulating mold compound that encapsulates the first semiconductor die, a plurality of power leads that protrude out of the encapsulant body and form power connections with the first semiconductor die, and a signal lead that protrudes out of the encapsulant body and forms a signal connection with the first semiconductor die, wherein the signal lead comprises a lead adapter retention feature that is configured to form an interlocked connection with a lead adapter that is fitted over an outer end of the signal lead.
    Type: Application
    Filed: December 2, 2021
    Publication date: June 8, 2023
    Inventors: Ajay Poonjal Pai, Tino Karczewski, Adrian Lis
  • Publication number: 20230170316
    Abstract: Described are solder stop features for electronic devices. An electronic device may include an electrically insulative substrate, a metallization on the electrically insulative substrate, a metal structure attached to a first main surface of the metallization via a solder joint, and a concavity formed in a sidewall of the metallization. The concavity is adjacent at least part of the solder joint and forms a solder stop. A first section of the metal structure is spaced apart from both the metallization and solder joint in a vertical direction that is perpendicular to the first main surface of the metallization. A linear dimension of the concavity in a horizontal direction that is coplanar with the metallization is at least twice the distance by which the first section of the metal structure is spaced apart from the first main surface of the metallization in the vertical direction. Additional solder stop embodiments are described.
    Type: Application
    Filed: November 30, 2021
    Publication date: June 1, 2023
    Inventors: Ivan Nikitin, Adrian Lis, Peter Scherl, Achim Althaus
  • Patent number: 11615291
    Abstract: Methods, apparatus, and computer readable media related to combining and/or training one or more neural network modules based on version identifier(s) assigned to the neural network module(s). Some implementations are directed to using version identifiers of neural network modules in determining whether and/or how to combine multiple neural network modules to generate a combined neural network model for use by a robot and/or other apparatus. Some implementations are additionally or alternatively directed to assigning a version identifier to an endpoint of a neural network module based on one or more other neural network modules to which the neural network module is joined during training of the neural network module.
    Type: Grant
    Filed: July 1, 2020
    Date of Patent: March 28, 2023
    Assignee: X DEVELOPMENT LLC
    Inventors: Adrian Li, Mrinal Kalakrishnan
  • Patent number: 11610153
    Abstract: Utilizing at least one existing policy (e.g. a manually engineered policy) for a robotic task, in generating reinforcement learning (RL) data that can be used in training an RL policy for an instance of RL of the robotic task. The existing policy can be one that, standing alone, will not generate data that is compatible with the instance of RL for the robotic task. In contrast, the generated RL data is compatible with RL for the robotic task at least by virtue of it including state data that is in a state space of the RL for the robotic task, and including actions that are in the action space of the RL for the robotic task. The generated RL data can be used in at least some of the initial training for the RL policy using reinforcement learning.
    Type: Grant
    Filed: December 30, 2019
    Date of Patent: March 21, 2023
    Assignee: X DEVELOPMENT LLC
    Inventors: Alexander Herzog, Adrian Li, Mrinal Kalakrishnan, Benjamin Holson
  • Publication number: 20230054812
    Abstract: A power semiconductor module includes: first and second substrates; at least one power semiconductor die arranged between and thermally coupled to a first side of each substrate, and electrically coupled to the first side of the first substrate; at least one rivet having a first end arranged on and electrically coupled to the first side of the first substrate; and an encapsulant encapsulating the at least one power semiconductor die, the at least one rivet and the substrates. At least parts of a second side of the substrates are exposed from the encapsulant. A second end of the at least one rivet is exposed at the encapsulant and configured to accept a press fit pin such that the at least one power semiconductor die can be electrically contacted from the outside.
    Type: Application
    Filed: July 28, 2022
    Publication date: February 23, 2023
    Inventors: Ajay Poonjal Pai, Tao Hong, Adrian Lis, Oliver Markus Kreiter, Matthias Rose
  • Patent number: 11571809
    Abstract: Techniques are described herein for robotic control using value distributions. In various implementations, as part of performing a robotic task, state data associated with the robot in an environment may be generated based at least in part on vision data captured by a vision component of the robot. A plurality of candidate actions may be sampled, e.g., from continuous action space. A trained critic neural network model that represents a learned value function may be used to process a plurality of state-action pairs to generate a corresponding plurality of value distributions. Each state-action pair may include the state data and one of the plurality of sampled candidate actions. The state-action pair corresponding to the value distribution that satisfies one or more criteria may be selected from the plurality of state-action pairs. The robot may then be controlled to implement the sampled candidate action of the selected state-action pair.
    Type: Grant
    Filed: September 11, 2020
    Date of Patent: February 7, 2023
    Assignee: X DEVELOPMENT LLC
    Inventors: Cristian Bodnar, Adrian Li, Karol Hausman, Peter Pastor Sampedro, Mrinal Kalakrishnan
  • Patent number: 11565401
    Abstract: Methods and apparatus related to receiving a request that includes robot instructions and/or environmental parameters, operating each of a plurality of robots based on the robot instructions and/or in an environment configured based on the environmental parameters, and storing data generated by the robots during the operating. In some implementations, at least part of the stored data that is generated by the robots is provided in response to the request and/or additional data that is generated based on the stored data is provided in response to the request.
    Type: Grant
    Filed: March 22, 2021
    Date of Patent: January 31, 2023
    Assignee: X DEVELOPMENT LLC
    Inventors: Peter Pastor Sampedro, Mrinal Kalakrishnan, Ali Yahya Valdovinos, Adrian Li, Kurt Konolige, Vincent Dureau