Patents by Inventor Adrian M. Tache
Adrian M. Tache has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9411348Abstract: A low-dropout (LDO) regulator includes a voltage reference circuit to provide a reference voltage, a pass device including an input terminal coupled to a voltage input, an output terminal to provide an output voltage and a control terminal, and an error amplifier including a first amplifier input for receiving the reference voltage, a second amplifier input, an amplifier output coupled to the control terminal of the pass device. Additionally, the LDO regulator includes a feedback circuit including a feedback input coupled to the output terminal of the pass device and a feedback output coupled to the second amplifier input to provide a feedback signal. The LDO regulator further includes a control circuit including a non-volatile memory to store configuration data to control operation of the voltage reference circuit, the pass device, the error amplifier, and the feedback circuit to produce the output voltage.Type: GrantFiled: April 13, 2010Date of Patent: August 9, 2016Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Radu H. Iacob, Cornel D. Stanescu, Adrian M. Tache, Sabin A. Eftimie
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Publication number: 20110248688Abstract: A low-dropout (LDO) regulator includes a voltage reference circuit to provide a reference voltage, a pass device including an input terminal coupled to a voltage input, an output terminal to provide an output voltage and a control terminal, and an error amplifier including a first amplifier input for receiving the reference voltage, a second amplifier input, an amplifier output coupled to the control terminal of the pass device. Additionally, the LDO regulator includes a feedback circuit including a feedback input coupled to the output terminal of the pass device and a feedback output coupled to the second amplifier input to provide a feedback signal. The LDO regulator further includes a control circuit including a non-volatile memory to store configuration data to control operation of the voltage reference circuit, the pass device, the error amplifier, and the feedback circuit to produce the output voltage.Type: ApplicationFiled: April 13, 2010Publication date: October 13, 2011Inventors: Radu H. Iacob, Cornel D. Stanescu, Adrian M. Tache, Sabin A. Eftimie
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Patent number: 7830714Abstract: A non-volatile memory (NVM) system includes a set of NVM cells, each including: a NVM transistor; an access transistor coupling the NVM transistor to a corresponding bit line; and a source select transistor coupling the NVM transistor to a common source. The NVM cells are written by a two-phase operation that includes an erase phase and a program phase. A common set of bit line voltages are applied to the bit lines during both the erase and programming phases. The access transistors are turned on and the source select transistors are turned off during the erase and programming phases. A first control voltage is applied to the control gates of the NVM transistors during the erase phase, and a second control voltage is applied to the control gates of the NVM transistors during the program phase. Under these conditions, the average required number of Fowler-Nordheim tunneling operations is reduced.Type: GrantFiled: April 21, 2008Date of Patent: November 9, 2010Assignee: Semiconductor Components Industries, L.L.C.Inventors: A. Peter Cosmin, Sorin S. Georgescu, George Smarandoiu, Adrian M. Tache
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Publication number: 20080291729Abstract: A non-volatile memory (NVM) system includes a set of NVM cells, each including: a NVM transistor; an access transistor coupling the NVM transistor to a corresponding bit line; and a source select transistor coupling the NVM transistor to a common source. The NVM cells are written by a two-phase operation that includes an erase phase and a program phase. A common set of bit line voltages are applied to the bit lines during both the erase and programming phases. The access transistors are turned on and the source select transistors are turned off during the erase and programming phases. A first control voltage is applied to the control gates of the NVM transistors during the erase phase, and a second control voltage is applied to the control gates of the NVM transistors during the program phase. Under these conditions, the average required number of Fowler-Nordheim tunneling operations is reduced.Type: ApplicationFiled: April 21, 2008Publication date: November 27, 2008Applicant: Catalyst Semiconductor, Inc.Inventors: A. Peter Cosmin, Sorin S. Georgescu, George Smarandoiu, Adrian M. Tache
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Patent number: 7005837Abstract: A digital potentiometer is disclosed that includes first, second, and third signal terminals. A chain of series-connected impedance elements with multiple tap points is connected between the first and second signal terminals. A plurality of first switching devices are each connected to a respective one of the multiple tap points and to an internal wiper node. A configurable output stage is connected between the internal wiper node and the third signal terminal. The configurable output stage includes a buffer and a second switching device. The second switching device is operable to bypass the buffer. A switching circuit controls switching of the first switching devices. The switching circuit includes a Gray-code counter, a Gray-code decoder, and a make-before-break circuit that controls the timing of the switching of the wiper switches.Type: GrantFiled: November 26, 2003Date of Patent: February 28, 2006Assignee: Catalyst Semiconductor, Inc.Inventors: Cornel D. Stanescu, Adrian M. Tache, Horia Profeta, Radu H. Iacob, Adam P. Cosmin
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Patent number: 6771053Abstract: A digital potentiometer, configurable and programmable using nonvolatile memory is disclosed. A unity-gain configured, rail-to-rail operational amplifier, used as voltage follower of buffer, can be inserted, by programming, between an internal wiper terminal and an output terminal of the digital potentiometer. This way, in certain applications, it is possible to take advantage of the low output resistance given by an analog buffer. The operational amplifier can be shutdown and bypassed by a switching device to provide a circuit behavior similar to a digital potentiometer without an output buffer. Using a dual-writing circuitry, first the complemented data, then the data itself, are written in the nonvolatile memory, improving the reliability. A Gray-code counter having a single bit changed at one time and no decode glitch is present. A make-before-break circuitry gives a short overlap conduction time for any adjacent pair of switches; one being turned-off while the other is turned-on.Type: GrantFiled: February 20, 2002Date of Patent: August 3, 2004Assignee: Catalyst Semiconductor, Inc.Inventors: Cornel D. Stanescu, Adrian M. Tache, Horia Profeta, Radu H. Iacob, Adam P. Cosmin
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Publication number: 20040108844Abstract: A digital potentiometer is disclosed that includes first, second, and third signal terminals. A chain of series-connected impedance elements with multiple tap points is connected between the first and second signal terminals. A plurality of first switching devices are each connected to a respective one of the multiple tap points and to an internal wiper node. A configurable output stage is connected between the internal wiper node and the third signal terminal. The configurable output stage includes a buffer and a second switching device. The second switching device is operable to bypass the buffer. A switching circuit controls switching of the first switching devices. The switching circuit includes a Gray-code counter, a Gray-code decoder, and a make-before-break circuit that controls the timing of the switching of the wiper switches.Type: ApplicationFiled: November 26, 2003Publication date: June 10, 2004Inventors: Cornel D. Stanescu, Adrian M. Tache, Horia Profeta, Radu H. Iacob, Adam P. Cosmin
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Publication number: 20030155902Abstract: A digital potentiometer, configurable and programmable using nonvolatile memory is disclosed. A unity-gain configured, rail-to-rail operational amplifier, used as voltage follower of buffer, can be inserted, by programming, between an internal wiper terminal and an output terminal of the digital potentiometer. This way, in certain applications, it is possible to take advantage of the low output resistance given by an analog buffer. The operational amplifier can be shutdown and bypassed by a switching device to provide a circuit behavior similar to a digital potentiometer without an output buffer. Using a dual-writing circuitry, first the complemented data, then the data itself, are written in the nonvolatile memory, improving the reliability. A Gray-code counter having a single bit changed at one time and no decode glitch is present. A make-before-break circuitry gives a short overlap conduction time for any adjacent pair of switches; one being turned-off while the other is turned-on.Type: ApplicationFiled: February 20, 2002Publication date: August 21, 2003Inventors: Cornel D. Stanescu, Adrian M. Tache, Horia Profeta, Radu H. Iacob, Adam P. Cosmin