Patents by Inventor Adrianus L. J. Burgmans
Adrianus L. J. Burgmans has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6579462Abstract: A flat display device, preferably of the PALC type, in which the plasma channels are formed by etching laterally-spaced slots in a spacer plate, attaching a thin dielectric sheet over the etched spacer plate, and bonding the etched spacer plate to a transparent substrate such that each channel is formed by the portion of the substrate between flanking walls formed by the etched slots in the spacer plate, adjacent flanking walls in the spacer plate, and the overlying portion of the thin dielectric sheet. In a modification, strengthening crossbars are formed between adjacent flanking walls.Type: GrantFiled: June 6, 2001Date of Patent: June 17, 2003Assignees: Philips Electronics North America Corporation, Tektronix, Inc.Inventors: Babar A. Khan, Henri R. J. R. Van Helleputte, Adrianus L. J. Burgmans, Karel Elbert Kuijk, Petrus F. G. Bongaerts, Jacob Bruinink, Thomas Stanley Buzak, Kevin John Ilcisin, Paul Christopher Martin
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Patent number: 6517402Abstract: A flat display device, preferably of the PALC type, in which the plasma channels are formed by etching laterally-spaced slots in a spacer plate, attaching a thin dielectric sheet over the etched spacer plate, and bonding the etched spacer plate to a transparent substrate such that each channel is formed by the portion of the substrate between flanking walls formed by the etched slots in the spacer plate, adjacent flanking walls in the spacer plate, and the overlying portion of the thin dielectric sheet. By positioning the flanking walls between channel electrode pairs, thus providing glass-to-glass interfaces, anodic bonding can be employed to assemble the three channel elements. Etching can be simplified by pre-attaching the unetched channel plate to the substrate or thin dielectric cover sheet with an intervening etch stop, and etching in situ using the-etch stop to prevent etching of the substrate or thin dielectric cover sheet.Type: GrantFiled: July 23, 2001Date of Patent: February 11, 2003Assignee: Koninklijke Philips Electronics N.V.Inventors: Babar A. Khan, Henri R. J. R. Van Helleputte, Adrianus L. J. Burgmans, Karel Elbert Kuijk, Petrus F. G. Bongaerts, Jacob Bruinink
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Patent number: 6433471Abstract: A flat display device, preferably of the PALC type, in which the plasma channels are formed by etching laterally-spaced slots in a spacer plate, attaching a thin dielectric sheet over the etched spacer plate, and bonding the etched spacer plate to a transparent substrate such that each channel is formed by the portion of the substrate between flanking walls formed by the etched slots in the spacer plate, adjacent flanking walls in the spacer plate, and the overlying portion of the thin dielectric sheet. In a modification, strengthening crossbars are formed between adjacent flanking walls.Type: GrantFiled: January 19, 1996Date of Patent: August 13, 2002Assignee: Philips Electronics North America CorporationInventors: Babar A. Khan, Henri R. J. R. Van Helleputte, Adrianus L. J. Burgmans, Karel Elbert Kuijk, Petrus F. G. Bongaerts, Jacob Bruinink, Thomas Stanley Buzak, Kevin John Ilcisin, Paul Christopher Martin
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Publication number: 20010026121Abstract: A flat display device, preferably of the PALC type, in which the plasma channels are formed by etching laterally-spaced slots in a spacer plate, attaching a thin dielectric sheet over the etched spacer plate, and bonding the etched spacer plate to a transparent substrate such that each channel is formed by the portion of the substrate between flanking walls formed by the etched slots in the spacer plate, adjacent flanking walls in the spacer plate, and the overlying portion of the thin dielectric sheet. In a modification, strengthening crossbars are formed between adjacent flanking walls.Type: ApplicationFiled: June 6, 2001Publication date: October 4, 2001Applicant: Philips Electronics North America CorporationInventors: Babar A. Khan, Henri R.J.R. Van Helleputte, Adrianus L.J. Burgmans, Karel Elbert Kuijk, Petrus F.G. Bongaerts, Jacob Bruinink, Thomas Stanley Buzak, Kevin John Ilcisin, Paul Christopher Martin
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Patent number: 6285127Abstract: A flat display device, preferably of the PALC type, in which the plasma channels are formed by etching laterally-spaced slots in a spacer plate, attaching a thin dielectric sheet over the etched spacer plate, and bonding the etched spacer plate to a transparent substrate such that each channel is formed by the portion of the substrate between flanking walls formed by the etched slots in the spacer plate, adjacent flanking walls in the spacer plate, and the overlying portion of the thin dielectric sheet. By positioning the flanking walls between channel electrode pairs, thus providing glass-to-glass interfaces, anodic bonding can be employed to assemble the three channel elements. Etching can be simplified by pre-attaching the unetched channel plate to the substrate or thin dielectric cover sheet with an intervening etch stop, and etching in situ using the etch stop to prevent etching of the substrate or thin dielectric cover sheet.Type: GrantFiled: June 11, 1998Date of Patent: September 4, 2001Assignee: Philips Electronics North America Corp.Inventors: Babar A. Khan, Henri R. J. R. Van Helleputte, Adrianus L. J. Burgmans, Karel Elbert Kuijk, Petrus F. G. Bongaerts, Jacob Bruinink
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Patent number: 6057895Abstract: A flat display device preferably of the PALC type in which the plasma channels are formed by depositing successive layers of electrically conductive and electrically insulating material on a substrate containing spaced walls of a resist material that are preferably structured with a negative slope to form in the space between the resist walls flanking channel walls comprising an electrode layer and rising above it a wall of insulating material with the electrode layer sides exposed to adjacent channels. Subsequently, the resist walls are removed by a lift-off process removing with it the layer deposits on the resist walls leaving behind the layer deposits between the resist walls. The remaining insulating walls are then covered with thin dielectric sheet-like member to form the plasma channels.Type: GrantFiled: September 28, 1995Date of Patent: May 2, 2000Assignee: Philips Electronics North America CorporationInventors: Henri R. J. R. Van Helleputte, Jacob Bruinink, Adrianus L. J. Burgmans, Petrus F. G. Bongaerts, Babar A. Khan, Karel E. Kuijk
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Patent number: 5868811Abstract: A flat display device, preferably of the PALC type, in which the plasma channels are formed by etching in a substrate laterally-spaced channels and bonding a thin dielectric sheet over the etched substrate. Adjoining each of the channels are shallow ledges, also formed by etching, which serve as recessed areas to receive enlarged ends serving as contact pads for each of the electrodes. Holes are formed in the thin dielectric sheet and contact material deposited on the bonded thin dielectric sheet such that the deposited material makes electrical contact with the underlying electrode contact pads and seals off the holes, which allows a plasma-forming atmosphere to be provided in the channels. This arrangement results in a glass-to-glass interface between the substrate and the thin dielectric sheet, which allows anodic bonding to be employed to assemble the two elements and thus eliminates the frit glass sealing process required in other constructions.Type: GrantFiled: August 14, 1997Date of Patent: February 9, 1999Assignee: Philips Electronics North America CorporationInventors: Babar Ali Khan, Henri R. J. R. Van Helleputte, Adrianus L. J. Burgmans, Petrus F. G. Bongaerts, Karel Elbert Kuijk, Jacob Bruinink
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Patent number: 5804920Abstract: A flat display device, preferably of the PALC type, in which the plasma channels are formed by etching laterally-spaced slots in a spacer plate, attaching a thin dielectric sheet over the etched spacer plate, and bonding the etched spacer plate to a transparent substrate such that each channel is formed by the portion of the substrate between flanking walls formed by the etched slots in the spacer plate, adjacent flanking walls in the spacer plate, and the overlying portion of the thin dielectric sheet. By positioning the flanking walls between channel electrode pairs, thus providing glass-to-glass interfaces, anodic bonding can be employed to assemble the three channel elements. Etching can be simplified by pre-attaching the unetched channel plate to the substrate or thin dielectric cover sheet with an intervening etch stop, and etching in situ using the etch stop to prevent etching of the substrate or thin dielectric cover sheet.Type: GrantFiled: January 19, 1996Date of Patent: September 8, 1998Assignee: Philips Electronics North America CorporationInventors: Babar A. Khan, Henri R. J. R. Van Helleputte, Adrianus L. J. Burgmans, Karel Elbert Kuijk, Petrus F. G. Bongaerts, Jacob Bruinink
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Patent number: 5764001Abstract: A flat display device, preferably of the PALC type, in which the plasma channels are formed by etching in a substrate laterally-spaced channels and bonding a thin dielectric sheet over the etched substrate. Adjoining each of the channels are shallow ledges, also formed by etching, which serve as recessed areas to receive enlarged ends serving as contact pads for each of the electrodes. Holes are formed in the thin dielectric sheet and contact material deposited on the bonded thin dielectric sheet such that the deposited material makes electrical contact with the underlying electrode contact pads and seals off the holes, which allows a plasma-forming atmosphere to be provided in the channels. This arrangement results in a glass-to-glass interface between the substrate and the thin dielectric sheet, which allows anodic bonding to be employed to assemble the two elements and thus eliminates the frit glass sealing process required in other constructions.Type: GrantFiled: December 18, 1995Date of Patent: June 9, 1998Assignee: Philips Electronics North America CorporationInventors: Babar Ali Khan, Henri R. J. R. Van Helleputte, Adrianus L. J. Burgmans, Petrus F. G. Bongaerts, Karel Elbert Kuijk, Jacob Bruinink
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Patent number: 5626772Abstract: A flat display device preferably of the PALC type in which a fragile micro-sheet covering the plasma channels is replaced by a more robust plate having etched spaced elongated cavities configured in such a way that the top portions of the plate between side walls of each cavity defining a channel and facing the bottom plate are substantially flat. Preferably, the thickness of the glass top plate separating each plasma discharge from an electro-optic pixel is made substantially uniformly thin while the side walls reinforce and greatly increase the strength of the plate making it less prone to breakage during assembly of a display panel. Preferably, the glass plate is etched by means of a plasma etching process.Type: GrantFiled: March 20, 1995Date of Patent: May 6, 1997Assignee: Philips Electronics North America CorporationInventors: Petrus F. G. Bongaerts, Jacob Bruinink, Adrianus L. J. Burgmans, Henri R. J. R. Van Helleputte, Babar A. Khan, Karel E. Kuijk, Thomas S. Buzak, Kevin J. Ilcisin, Paul C. Martin
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Patent number: 5596431Abstract: A method for making an electrical device such as a PALC display device, and the electrical device or PALC device so made, in which a channel plate is provided with substantially vertical side walls, and the electrodes are formed by a self-aligning anisotropic plasma etching process which requires no photolithography. A similar process may be used to form a fanout region for individual contacting of channel electrodes. For improved contacting, preferably the fanout region is also channelled and an upstanding structure such as columns provided in the fanout channels so that the spaces between the columns and between the columns and the side walls are filled up with deposited metal that remains following the anisotropic etching process.Type: GrantFiled: March 29, 1995Date of Patent: January 21, 1997Assignee: Philips Electronics North America Corp.Inventors: Petrus F. G. Bongaerts, Jacob Bruinink, Adrianus L. J. Burgmans, Henri R. J. R. Van Helleputte, Babar A. Khan, Karel E. Kuijk
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Patent number: 4871942Abstract: The invention relates to a low-pressure discharge lamp having a discharge space which is limited by at least two walls (1, 2) which are at some distance from each other, there being present in this discharge space a third, thin-walled member (7) which alternately extends to at least near one wall (1) and the other wall (2), the discharge path being folded. The thin-walled member (7) has end faces, (14), which extend in parallel with the walls 1 and 2 and which are connected thereto in a discharge-tight manner.Type: GrantFiled: April 7, 1986Date of Patent: October 3, 1989Assignee: U.S. Philips CorporationInventors: Adrianus L. J. Burgmans, Petrus R. Van Ijzendoorn