Abstract: A method of fabricating high-voltage semiconductor devices, the semiconductor devices and a mask for implanting dopants in a semiconductor are described.

Abstract: A down converter includes an integrated circuit, which includes a control FET (CF) and a synchronous rectifier FET (SF). The control FET is a lateral double-diffused (LDMOS) FET, and the conductivity-type of the LDMOS FET and the conductivity-type of the substrate are of the same type.

Abstract: A PMOS device comprises a semiconductor-on-insulator (SOI) substrate having a layer of insulating material over which is provided an active layer of n-type semiconductor material. P-type source and drain regions are provided by diffusion in the n-type active layer. A p-type plug is provided at the source region, which extends through the active semiconductor layer to the insulating layer. The plug is provided so as to enable the source voltage applied to the device to be lifted significantly above the substrate voltage without the occurrence of excessive leakage currents.

Abstract: A down converter includes an integrated circuit, which includes a control FET (CF) and a synchronous rectifier FET (SF). The control FET is a lateral double-diffused (LDMOS) FET, and the conductivity-type of the LDMOS FET and the conductivity-type of the substrate are of the same type.

Abstract: A method of fabricating high-voltage semiconductor devices, the semiconductor devices and a mask for implanting dopants in a semiconductor are described.

Abstract: High-Voltage Lateral MOSFET and Lateral Double-diffused MOS (LDMOS) for HV power applications with multiple paths for conduction in the drain extension and methods of fabrication are described.

Abstract: The invention relates to a high-voltage deep depletion transistor, provided in a semiconductor body (1) having a substrate (2) of a first conductivity type, for example the p-type, and a surface layer (3) of the opposite conductivity type, for example the n-type for an n-channel transistor. To prevent formation of inversion layers below the gate, the channel is subdivided into a plurality of sub-channel regions (7a, 7b, 7c, 7c) mutually separated by p-type regions (11a, 11b, 11c, 11d) which serve to remove generated holes. The p-type regions extend across the whole thickness of the channel and are contacted via the substrate. Each sub-channel region may be subdivided further by intermediate p-type regions (13) to improve the removal of holes.

Abstract: In high-voltage devices comprising a lightly doped region (3) provided with a heavily doped contact zone 4, damage caused by local breakdown at the corner of the contact zone may occur as a result of the Kirk effect at a high current density. To improve the robustness of the device, an annular protection zone (14) of the same conductivity type is provided so as to surround the contact zone at a small distance. As a result, breakdown will occur initially at the corner of the protection zone. However, due to the resistance between the protection zone and the contact zone, a more uniform current distribution is obtained, which prevents damage caused by local current concentration.

Abstract: The performance of high-voltage devices is often influenced by charge-creep effects in the package. In order to avoid the resultant degradation, a bleeder may be used between the device and the package. However, it has been found in practice that the use of a high-resistive bleeder may lead to a certain instability of the device during operation. According to the invention, the bleeder (8) is provided with a plurality of conductive regions (12, 13) which are distributed in such a way that, when a high voltage is applied across the bleeder, a non-linear potential profile across the bleeder is obtained, which harmonizes with the ideal potential profile without the bleeder, instead of a linear profile which would have been obtained in the absence of said conductive regions due to charge-loading effects, and which would result in the above-mentioned instability effects.

Abstract: The invention relates to a high-voltage deep depletion transistor, provided in a semiconductor body (1) having a substrate (2) of a first conductivity type, for example the p-type, and a surface layer (3) of the opposite conductivity type, for example the n-type for an n-channel transistor. To prevent formation of inversion layers below the gate, the channel is subdivided into a plurality of sub-channel regions (7a, 7b, 7c, 7d) mutually separated by p-type regions (11a, 11b, 11c, 11d) which serve to remove generated holes. The p-type regions extend across the whole thickness of the channel and are contacted via the substrate. Each sub-channel region may be subdivided further by intermediate p-type regions (13) to improve the removal of holes.

Abstract: The invention relates to a high-voltage deep depletion transistor, provided in a semiconductor body (1) having a substrate (2) of a first conductivity type, for example the p-type, and a surface layer (3) of the opposite conductivity type, for example the n-type for an n-channel transistor. To prevent formation of inversion layers below the gate, the channel is subdivided into a plurality of sub-channel regions (7a, 7b, 7c, 7d) mutually separated by p-type regions (11a, 11b, 11c, 11d) which serve to remove generated holes. The p-type regions extend across the whole thickness of the channel and are contacted via the substrate. Each sub-channel region may be subdivided further by intermediate p-type regions (13) to improve the removal of holes.

Abstract: The invention relates to a high-voltage deep depletion transistor, provided in a semiconductor body (1) having a substrate (2) of a first conductivity type, for example the p-type, and a surface layer (3) of the opposite conductivity type, for example the n-type for an n-channel transistor. To prevent formation of inversion layers below the gate, the channel is subdivided into a plurality of sub-channel regions (7a, 7b, 7c, 7d) mutually separated by p-type regions (11a, 11b, 11c, 11d) which serve to remove generated holes. The p-type regions extend across the whole thickness of the channel and are contacted via the substrate. Each sub-channel region may be subdivided further by intermediate p-type regions (13) to improve the removal of holes.

Abstract: An integrated voltage-controllable RF-signal attenuator having a pair of signal input terminals and a pair of signal output terminals, comprising a first signal transmission path connected between a signal input terminal and a signal output terminal, which attenuator includes a first pair of PIN-diodes which are arranged in series opposition and which have a RF-signal impedance which is variable by passing a variable forward bias current through them, and a signal discharge path connected between the signal input terminals, said discharge path comprising a second pair of PIN-diodes arranged in series opposition, which attenuator also includes a special circuit of pairs of PIN-diodes, arranged in series opposition, by means of which the distortions can be kept lower within the normal attenuation range than is possible with the known attenuators which are provided with the same pairs of PIN-diodes, arranged in series opposition.