Patents by Inventor Adrien Benoit Ille

Adrien Benoit Ille has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11594878
    Abstract: In accordance with an embodiment, a method for protecting a circuit includes: receiving a stress caused by an electrostatic discharge (ESD) event from a first node; limiting a current using a current limiting element coupled between the first node and a second node connected to the circuit; and limiting a voltage on the second node caused by the ESD event using a protection circuit including at least one MOS transistor having a load path coupled to the second node, where the at least one MOS transistor is disposed in a well, and a bias circuit coupled to a gate and a bulk connection of the at least one MOS transistor and a supply node.
    Type: Grant
    Filed: August 16, 2021
    Date of Patent: February 28, 2023
    Assignee: Infineon Technologies AG
    Inventors: Adrien Benoit Ille, Claudia Kupfer, Gernot Langguth
  • Publication number: 20210376601
    Abstract: In accordance with an embodiment, a method for protecting a circuit includes: receiving a stress caused by an electrostatic discharge (ESD) event from a first node; limiting a current using a current limiting element coupled between the first node and a second node connected to the circuit; and limiting a voltage on the second node caused by the ESD event using a protection circuit including at least one MOS transistor having a load path coupled to the second node, where the at least one MOS transistor is disposed in a well, and a bias circuit coupled to a gate and a bulk connection of the at least one MOS transistor and a supply node.
    Type: Application
    Filed: August 16, 2021
    Publication date: December 2, 2021
    Inventors: Adrien Benoit Ille, Claudia Kupfer, Gernot Langguth
  • Patent number: 11159014
    Abstract: In accordance with an embodiment, a method for protecting a circuit includes: receiving a stress caused by an electrostatic discharge (ESD) event from a first node; limiting a current using a current limiting element coupled between the first node and a second node connected to the circuit; and limiting a voltage on the second node caused by the ESD event using a protection circuit including at least one MOS transistor having a load path coupled to the second node, where the at least one MOS transistor is disposed in a well, and a bias circuit coupled to a gate and a bulk connection of the at least one MOS transistor and a supply node.
    Type: Grant
    Filed: January 30, 2020
    Date of Patent: October 26, 2021
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Adrien Benoit Ille, Claudia Kupfer, Gernot Langguth
  • Patent number: 11088542
    Abstract: In accordance with an embodiment, a method for electrostatic discharge (ESD) protection includes: dividing a voltage between a plurality of circuit nodes using a voltage divider circuit to form a divided voltage; compensating a temperature dependency of the divided voltage to form a temperature compensated divided voltage; monitoring the voltage between the plurality of circuit nodes using a transient detection circuit to form a transient detection signal; and activating a clamp circuit coupled between the plurality of circuit nodes based on the temperature compensated divided voltage and based on the transient detection signal.
    Type: Grant
    Filed: January 30, 2020
    Date of Patent: August 10, 2021
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Gernot Langguth, Adrien Benoit Ille, Steffen Schumann
  • Publication number: 20210242677
    Abstract: In accordance with an embodiment, a method for electrostatic discharge (ESD) protection includes: dividing a voltage between a plurality of circuit nodes using a voltage divider circuit to form a divided voltage; compensating a temperature dependency of the divided voltage to form a temperature compensated divided voltage; monitoring the voltage between the plurality of circuit nodes using a transient detection circuit to form a transient detection signal; and activating a clamp circuit coupled between the plurality of circuit nodes based on the temperature compensated divided voltage and based on the transient detection signal.
    Type: Application
    Filed: January 30, 2020
    Publication date: August 5, 2021
    Inventors: Gernot Langguth, Adrien Benoit Ille, Steffen Schumann
  • Publication number: 20210242678
    Abstract: In accordance with an embodiment, a method for protecting a circuit includes: receiving a stress caused by an electrostatic discharge (ESD) event from a first node; limiting a current using a current limiting element coupled between the first node and a second node connected to the circuit; and limiting a voltage on the second node caused by the ESD event using a protection circuit including at least one MOS transistor having a load path coupled to the second node, where the at least one MOS transistor is disposed in a well, and a bias circuit coupled to a gate and a bulk connection of the at least one MOS transistor and a supply node.
    Type: Application
    Filed: January 30, 2020
    Publication date: August 5, 2021
    Inventors: Adrien Benoit Ille, Claudia Kupfer, Gernot Langguth