Abstract: An apparatus comprising a first circuit and a second circuit. The first circuit may be configured to generate an MPEG packet data stream. The second circuit may be configured to (i) scramble the data stream to generate a scrambled data stream, (ii) encode the scrambled data stream to generate an encoded data stream, (iii) interleave the encoded data stream, (iv) encode the interleaved data stream, (v) modulate the encoded data stream, and (vi) filter the modulated data stream.

Abstract: A channel encoding system and a channel decoding system for use in transmitting multiple high definition television programs in a single satellite channel. The channel encoding system may comprise a frame formatter that may be configured to format a transport stream to produce a block stream. An error correction encoder may be configured to encode the block stream to produce an error protected block stream. An interleave module may be configured to interleave the error protected block stream to produce a data stream. A turbo encoder may be configured to encode the data stream to produce an encoded stream. A bit-to-symbol mapper may be configured to map the encoded stream to produce a symbol stream capable of at least eight different symbols. Finally, a modulator may be configured to modulate the symbol stream.

Abstract: An apparatus comprising a first circuit and a second circuit. The first circuit may be configured to generate an MPEG packet data stream. The second circuit may be configured to (i) scramble the data stream to generate a scrambled data stream, (ii) encode the scrambled data stream to generate an encoded data stream, (iii) interleave the encoded data stream, (iv) encode the interleaved data stream, (v) modulate the encoded data stream, and (vi) filter the modulated data stream.

Abstract: The present invention includes a method and system for improving performance of a receiver at a low signal-to-noise ratio. According to a first aspect, an encoded signal is received. The encoded signal is decoded to recover information in the encoded signal. Next, a threshold is ascertained in response to the recovered information, the threshold indicating a maximum number of acceptable errors in the recovered information. It is determined if the errors in the recovered information are in excess of the ascertained threshold. Information is then extracted from the encoded signal without decoding. The extracted information is output when the errors in the recovered information are in excess of the ascertained threshold. In all other instances, the recovered information is output. According to a second aspect, recovered signal data is output, the recovered signal data being either the recovered information or the extracted information.

Abstract: The invention provides a method and system for correcting imbalance in in-phase and quadrature components of a modulated received signal. The method includes assuming a signal imbalance to exist in the received signal, the signal imbalance having an amplitude imbalance and a phase imbalance, generating an amplitude imbalance correction factor and a phase imbalance correction factor to lessen the signal imbalance, and re-evaluating the amplitude and phase imbalance correction factors over a set of readings of the in-phase and quadrature components until the signal imbalance is minimized.

Abstract: The purpose of the present invention is to provide a method for choosing the coding schemes, mappings, and puncturing rates for a modulation/demodulation system which would allow the system to compensate for certain transformations of the code in a post-Viterbi step as opposed to pre-Viterbi. This would allow for faster and simpler decoding of a code.

Abstract: This invention concerns a novel Viterbi decoding apparatus and method in which a survivor path unit (SPU) implements the traceback method with a RAM which stores path information in a manner which allows fast read access without requiring physical partitioning of the RAM. This results in an implementation that requires less chip area than conventional solutions.

Abstract: A communications receiver system is presented for detecting burst errors and providing erasure information to a block decoder, thereby effectively doubling the conventional correction capability of the block decoder with only a minimal increase in complexity. In one embodiment, the receiver includes a demodulator which includes circuitry to detect error bursts in the received symbol sequence. Once detected, the locations of symbols in error are marked in the form of erasure flags. An error correction decoder is then able to correct up to twice as many errors with the additional information provided by the erasure flags.

Abstract: A communications receiver system is presented for detecting burst errors and providing erasure information to the block decoder, thereby effectively doubling the conventional correction capability of the block decoder with only a minimal increase in complexity. In one embodiment, this mechanism takes the form of a circuit which re-encodes the output of the inner decoder, compares it with the received sequence of code symbols, and flags a portion of the inner decoder output for erasure when an excessive number of code symbol errors are detected. In a second embodiment, this mechanism takes the form of a circuit which makes hard symbol decisions on the channel signal, compares the hard decisions to the channel signal to determine a noise level, and thereafter flags the channel output in regions with excessive noise levels.

Abstract: A communications receiver system is presented for detecting burst errors and providing erasure information to the block decoder (outer decoder), thereby effectively doubling the conventional correction capability of the block decoder with only a minimal increase in complexity. In one embodiment, this mechanism takes the form of a circuit which re-encodes the output of the inner decoder, compares it with the received sequence of code symbols, and flags a portion of the inner decoder output for erasure when an excessive number of code symbol errors are detected. In a second embodiment, this mechanism takes the form of a circuit which makes hard symbol decisions on the channel signal, compares the hard decisions to the channel signal to determine a noise level, and thereafter flags the channel output in regions with excessive noise levels.