Abstract: A display device includes a substrate, a semiconductor layer on the substrate, a gate insulating layer on the semiconductor layer and having one or more first openings, a gate electrode on the gate insulating layer, a first capacitor electrode on the gate insulating layer, a first interlayer insulating layer on the first capacitor electrode and having one or more second openings, a second capacitor electrode on the first interlayer insulating layer, a source electrode and a drain electrode connected with the semiconductor layer, and a light emitting diode connected with the drain electrode. The first capacitor electrode includes one or more protrusions in the first openings of the gate insulating layer and correspond to a shape of the first openings, and the second capacitor electrode includes one or more protrusions in the second openings of the first interlayer insulating layer and correspond to a shape of the second openings.

Abstract: A display device includes a substrate, a semiconductor layer on the substrate, a gate insulating layer on the semiconductor layer and having one or more first openings, a gate electrode on the gate insulating layer, a first capacitor electrode on the gate insulating layer, a first interlayer insulating layer on the first capacitor electrode and having one or more second openings, a second capacitor electrode on the first interlayer insulating layer, a source electrode and a drain electrode connected with the semiconductor layer, and a light emitting diode connected with the drain electrode. The first capacitor electrode includes one or more protrusions in the first openings of the gate insulating layer and correspond to a shape of the first openings, and the second capacitor electrode includes one or more protrusions in the second openings of the first interlayer insulating layer and correspond to a shape of the second openings.

Abstract: A liquid crystal display includes: a first substrate; a pixel electrode disposed on the first substrate; a second substrate facing the first substrate; a common electrode disposed on the second substrate; and a liquid crystal layer disposed between the first substrate and the second substrate. The common electrode includes a first cross-shaped cutout overlapping the pixel electrode, and a second cutout parallel to an edge of the pixel electrode, the second cutout being separated from the edge of the pixel electrode.

Abstract: The display device includes a substrate, a thin film transistor (TFT), which includes a gate electrode, a semiconductor layer, and source and drain electrodes, on the substrate member, a passivation layer on the TFT and having an opening to expose a portion of the drain electrode, and a pixel electrode directly on the drain electrode and only within the opening.

Abstract: A curved liquid crystal display (LCD) includes: a curved liquid crystal panel assembly; a look-up table storing correction values, the correction values being values for selectively correcting image signals for a black mura region where black mura generated in the curved liquid crystal panel assembly; and a signal controller for generating an image data signal adjusted by the correction values of the image signals for the black mura region.

Abstract: A liquid crystal display includes: a first substrate; a pixel electrode disposed on the first substrate; a second substrate facing the first substrate; a common electrode disposed on the second substrate; and a liquid crystal layer disposed between the first substrate and the second substrate. The common electrode includes a first cross-shaped cutout overlapping the pixel electrode, and a second cutout parallel to an edge of the pixel electrode, the second cutout being separated from the edge of the pixel electrode.

Abstract: A thin film transistor display panel includes a gate electrode on a substrate; a gate insulating layer on the substrate and the gate electrode; a planarization layer on the gate insulating layer and at opposing sides of the gate electrode, where the planarization layer exposes the gate insulating layer; a semiconductor layer on the gate insulating layer; and a source electrode and a drain electrode on the semiconductor layer and spaced apart from each other.

Abstract: A liquid crystal display includes: a first substrate; a pixel electrode disposed on the first substrate; a second substrate facing the first substrate; a common electrode disposed on the second substrate; and a liquid crystal layer disposed between the first substrate and the second substrate. The common electrode includes a first cross-shaped cutout overlapping the pixel electrode, and a second cutout parallel to an edge of the pixel electrode, the second cutout being separated from the edge of the pixel electrode.

Abstract: The display device includes a substrate, a thin film transistor (TFT), which includes a gate electrode, a semiconductor layer, and source and drain electrodes, on the substrate member, a passivation layer on the TFT and having an opening to expose a portion of the drain electrode, and a pixel electrode directly on the drain electrode and only within the opening.

Abstract: A thin film transistor display panel includes a gate electrode on a substrate; a gate insulating layer on the substrate and the gate electrode; a planarization layer on the gate insulating layer and at opposing sides of the gate electrode, where the planarization layer exposes the gate insulating layer; a semiconductor layer on the gate insulating layer; and a source electrode and a drain electrode on the semiconductor layer and spaced apart from each other.

Abstract: The display device includes a substrate, a thin film transistor (TFT), which includes a gate electrode, a semiconductor layer, and source and drain electrodes, on the substrate member, a passivation layer on the TFT and having an opening to expose a portion of the drain electrode, and a pixel electrode directly on the drain electrode and only within the opening.

Abstract: A thin film transistor display panel includes a gate electrode on a substrate; a gate insulating layer on the substrate and the gate electrode; a planarization layer on the gate insulating layer and at opposing sides of the gate electrode, where the planarization layer exposes the gate insulating layer; a semiconductor layer on the gate insulating layer; and a source electrode and a drain electrode on the semiconductor layer and spaced apart from each other.

Abstract: A display panel includes; a lower gate line, a lower data line disposed substantially perpendicular to the lower gate line, a thin film transistor (“TFT”) connected to the lower gate line and the lower data line, an insulating layer disposed on the lower gate line, the lower data line, and the TFT and having a plurality of trenches exposing the lower gate line and the lower data line, an upper gate line disposed in the trench on the lower gate line, an upper data line disposed in the trench on the lower data line, and a pixel electrode connected to the TFT.

Abstract: A thin film transistor display panel includes a gate electrode on a substrate; a gate insulating layer on the substrate and the gate electrode; a planarization layer on the gate insulating layer and at opposing sides of the gate electrode, where the planarization layer exposes the gate insulating layer; a semiconductor layer on the gate insulating layer; and a source electrode and a drain electrode on the semiconductor layer and spaced apart from each other.

Abstract: An array substrate includes a gate line, a data line, a pixel electrode, a first thin film transistor, and a second thin film transistor. The gate line includes a plurality of sub lines receiving a gate signal. The data line crosses the gate line. The pixel electrode is between adjacent sub lines. The first thin film transistor is electrically connected to a first sub line of the adjacent sub lines, the pixel electrode, and the data line. The second thin film transistor is electrically connected to a second sub line of the adjacent sub lines, the pixel electrode, and the data line. Therefore, an image display quality is improved.

Abstract: A display panel includes; a lower gate line, a lower data line disposed substantially perpendicular to the lower gate line, a thin film transistor (“TFT”) connected to the lower gate line and the lower data line, an insulating layer disposed on the lower gate line, the lower data line, and the TFT and having a plurality of trenches exposing the lower gate line and the lower data line, an upper gate line disposed in the trench on the lower gate line, an upper data line disposed in the trench on the lower data line, and a pixel electrode connected to the TFT.

Abstract: A method for manufacturing a display panel includes; formation of a lower gate line, disposal of a semiconductor on the lower gate line, disposal of a lower data line substantially perpendicular to the lower gate line, disposal of an insulating layer having a plurality of trenches exposing the lower gate line and the lower data line on the lower data line, disposal of an upper gate line directly on the lower gate line and within the plurality of trenches, and disposal of an upper data line directly on the lower data line and within the plurality of trenches.

Abstract: A plurality of gate lines having gate electrodes are formed on a substrate and a semiconductor layer is formed on a gate insulating layer covering the gate lines. A plurality of data lines intersecting the gate lines are formed on the gate insulating layer and a plurality of drain electrodes are formed extending parallel with and adjacent to the data lines. Furthermore, a plurality of storage capacitor conductors are formed to be connected to the drain electrodes and to overlap an adjacent gate line. A passivation layer made of an organic material is formed on the above structure and has a contact hole. Furthermore, a plurality of pixel electrodes are formed to be electrically connected to the drain electrodes through the contact hole.

Abstract: A display panel includes; a lower gate line, a lower data line disposed substantially perpendicular to the lower gate line, a thin film transistor (“TFT”) connected to the lower gate line and the lower data line, an insulating layer disposed on the lower gate line, the lower data line, and the TFT and having a plurality of trenches exposing the lower gate line and the lower data line, an upper gate line disposed in the trench on the lower gate line, an upper data line disposed in the trench on the lower data line, and a pixel electrode connected to the TFT.

Abstract: A display panel includes; a lower gate line, a lower data line disposed substantially perpendicular to the lower gate line, a thin film transistor (“TFT”) connected to the lower gate line and the lower data line, an insulating layer disposed on the lower gate line, the lower data line, and the TFT and having a plurality of trenches exposing the lower gate line and the lower data line, an upper gate line disposed in the trench on the lower gate line, an upper data line disposed in the trench on the lower data line, and a pixel electrode connected to the TFT.