Patents by Inventor Aelan Mosden
Aelan Mosden has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240128088Abstract: Methods for selective etching of one layer or material relative to another layer or material adjacent thereto. In an example, a SiGe layer is etched relative to or selective to another silicon containing layer which either contains no germanium or geranium in an amount less than that of the target layer.Type: ApplicationFiled: October 17, 2022Publication date: April 18, 2024Applicant: TOKYO ELECTRON LIMITEDInventors: Toshiki KANAKI, Subhadeep KAL, Aelan MOSDEN, lvo OTTO, IV, Masashi MATSUMOTO, Shinji IRIE
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Publication number: 20240096639Abstract: A surface of a substrate is modified, where the substrate includes at least two different layers or films of different materials. The modified layer is then selectively converted to a protection layer on one of the layers, while the other layer is etched.Type: ApplicationFiled: September 15, 2022Publication date: March 21, 2024Applicant: TOKYO ELECTRON LIMITEDInventors: Jonathan HOLLIN, Matthew Flaugh, Subhadeep Kal, Aelan Mosden
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Publication number: 20230420267Abstract: A method of processing a substrate that includes: forming an etch mask over a ruthenium (Ru) metal layer of a substrate, the etch mask exposing a first portion of the Ru metal layer and covering a second portion of the Ru metal layer; and converting the first portion of the Ru metal layer into a volatile Ru etch product in a processing chamber, the converting including exposing the Ru metal layer of the substrate to a halogen-containing vapor, and to a ligand-exchange agent to form the volatile Ru etch product, where the converting is an oxygen-free process.Type: ApplicationFiled: May 27, 2022Publication date: December 28, 2023Inventors: Stephanie Oyola-Reynoso, Ivo Otto, IV, Qi Wang, Aelan Mosden
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Patent number: 11837467Abstract: In certain embodiments, a method of processing a semiconductor substrate includes positioning a semiconductor substrate in a plasma chamber of a plasma tool. The semiconductor substrate includes a film stack that includes silicon layers and germanium-containing layers in an alternating stacked arrangement, with at least two silicon layers and at least two germanium-containing layers. The method includes exposing, in a first plasma step executed in the plasma chamber, the film stack to a first plasma. The first plasma is generated from first gases that include nitrogen gas, hydrogen gas, and fluorine gas. The method includes exposing, in a second plasma step executed in the plasma chamber, the film stack to a second plasma. The second plasma is generated from second gases comprising fluorine gas and oxygen gas. The second plasma selectively etches the silicon layers.Type: GrantFiled: July 12, 2022Date of Patent: December 5, 2023Assignee: Toyko Electron LimitedInventors: Pingshan Luan, Christopher Catano, Aelan Mosden
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Publication number: 20230360921Abstract: Selective protection and etching is provided which can be utilized in etching of a silicon containing layer with respect to a Ge or SiGe layer. In an example, the layers are stacked, and an oxide is on a side surface of the layers. A treatment is utilized to provide a modified surface or termination surface on side surfaces of the Ge/SiGe layers, and a heat treatment is provided after the gas treatment to selectively sublimate layer portions on side surfaces of the Si containing layers. The gas treatment and heat treatment are preferably in non-plasma environments. Thereafter, a plasma process is performed to form a protective layer on the Ge containing layers, and the Si containing layers can be etched with the plasma.Type: ApplicationFiled: October 12, 2022Publication date: November 9, 2023Applicant: TOKYO ELECTRON LIMITEDInventors: Matthew FLAUGH, Jonathan HOLLIN, Subhadeep KAL, Pingshan LUAN, Hamed HAJIBABAEINAJAFABADI, Yu-Hao TSAI, Aelan MOSDEN
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Publication number: 20230317465Abstract: A method of processing a substrate that includes: positioning a substrate in a plasma processing chamber, the substrate including a layer stack of alternating layers of silicon (Si) layers and silicon-germanium (SiGe) layers, the substrate including a recess that exposes sidewalls of the Si layers and sidewalls of the SiGe layers; flowing a first process gas into the plasma processing chamber; while flowing the first process gas, pulsing a second process gas into the plasma processing chamber at a pulsing frequency; while flowing the first process gas and pulsing the second process gas, applying power to a source electrode and a bias electrode of the plasma processing chamber to generate a plasma in the plasma processing chamber; and exposing the substrate to the plasma to laterally etch a portion of the Si layers selectively to the SiGe layers and form indents between the SiGe layers.Type: ApplicationFiled: April 5, 2022Publication date: October 5, 2023Inventors: Hamed Hajibabaeinajafabadi, Pingshan Luan, Aelan Mosden, Sergey Voronin
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Patent number: 11715643Abstract: A method for the dry removal of a material on a microelectronic workpiece is described. The method includes receiving a substrate having a working surface exposing a metal layer and having at least one other material exposed or underneath the metal layer; and differentially etching the metal layer relative to the other material by exposing the substrate to a controlled gas-phase environment containing an anhydrous halogen compound.Type: GrantFiled: June 2, 2020Date of Patent: August 1, 2023Assignee: TOKYO ELECTRON LIMITEDInventors: Subhadeep Kal, Daisuke Ito, Matthew Flaugh, Yusuke Muraki, Aelan Mosden
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Patent number: 11538690Abstract: In certain embodiments, a method for processing a semiconductor substrate includes receiving a semiconductor substrate that includes a film stack. The film stack includes a first silicon layer, a second silicon layer, and a first germanium-containing layer positioned between the first silicon layer and the second silicon layer. The method further includes selectively etching the first germanium-containing layer by exposing the film stack to a plasma that includes fluorine agents, nitrogen agents, and hydrogen agents. The plasma etches the first germanium-containing layer and causes a passivation layer to be formed on exposed surfaces of the first silicon layer and the second silicon layer to inhibit etching of the first silicon layer and the second silicon layer during exposure of the film stack to the plasma.Type: GrantFiled: February 9, 2021Date of Patent: December 27, 2022Assignee: TOKYO ELECTRON LIMITEDInventors: Pingshan Luan, Aelan Mosden
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Patent number: 11538691Abstract: A method for the dry removal of a material on a microelectronic workpiece is described. The method includes receiving a workpiece having a surface exposing a target layer composed of silicon and either (1) organic material or (2) both oxygen and nitrogen, and selectively removing at least a portion of the target layer from the workpiece. The selective removal includes exposing the surface of the workpiece to a chemical environment containing N, H, and F at a first setpoint temperature to chemically alter a surface region of the target layer, and then, elevating the temperature of the workpiece to a second setpoint temperature to remove the chemically treated surface region of the target layer.Type: GrantFiled: March 31, 2021Date of Patent: December 27, 2022Assignee: TOKYO ELECTRON LIMITEDInventors: Subhadeep Kal, Nihar Mohanty, Angelique D. Raley, Aelan Mosden, Scott W. Lefevre
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Publication number: 20220351970Abstract: In certain embodiments, a method of processing a semiconductor substrate includes positioning a semiconductor substrate in a plasma chamber of a plasma tool. The semiconductor substrate includes a film stack that includes silicon layers and germanium-containing layers in an alternating stacked arrangement, with at least two silicon layers and at least two germanium-containing layers. The method includes exposing, in a first plasma step executed in the plasma chamber, the film stack to a first plasma. The first plasma is generated from first gases that include nitrogen gas, hydrogen gas, and fluorine gas. The method includes exposing, in a second plasma step executed in the plasma chamber, the film stack to a second plasma. The second plasma is generated from second gases comprising fluorine gas and oxygen gas. The second plasma selectively etches the silicon layers.Type: ApplicationFiled: July 12, 2022Publication date: November 3, 2022Inventors: Pingshan Luan, Christopher Catano, Aelan Mosden
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Patent number: 11482423Abstract: In certain embodiments, a method for processing a semiconductor substrate includes receiving a semiconductor substrate that includes a film stack. The film stack includes first and second germanium-containing layers and a first silicon layer positioned between the first and second germanium-containing layers. The method includes selectively etching the first silicon layer by exposing the film stack to a plasma that includes fluorine agents and nitrogen agents. The plasma etches the first silicon layer, and causes a passivation layer to be formed on exposed surfaces of the first and second germanium-containing layers to inhibit etching of the first and second germanium-containing layers during exposure of the film stack to the plasma.Type: GrantFiled: January 28, 2021Date of Patent: October 25, 2022Assignee: Tokyo Electron LimitedInventors: Pingshan Luan, Aelan Mosden
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Patent number: 11424120Abstract: In certain embodiments, a method of processing a semiconductor substrate includes positioning a semiconductor substrate in a plasma chamber of a plasma tool. The semiconductor substrate includes a film stack that includes silicon layers and germanium-containing layers in an alternating stacked arrangement, with at least two silicon layers and at least two germanium-containing layers. The method includes exposing, in a first plasma step executed in the plasma chamber, the film stack to a first plasma. The first plasma is generated from first gases that include nitrogen gas, hydrogen gas, and fluorine gas. The method includes exposing, in a second plasma step executed in the plasma chamber, the film stack to a second plasma. The second plasma is generated from second gases comprising fluorine gas and oxygen gas. The second plasma selectively etches the silicon layers.Type: GrantFiled: January 22, 2021Date of Patent: August 23, 2022Assignee: Tokyo Electron LimitedInventors: Pingshan Luan, Christopher Catano, Aelan Mosden
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Publication number: 20220254645Abstract: In certain embodiments, a method for processing a semiconductor substrate includes receiving a semiconductor substrate that includes a film stack. The film stack includes a first silicon layer, a second silicon layer, and a first germanium-containing layer positioned between the first silicon layer and the second silicon layer. The method further includes selectively etching the first germanium-containing layer by exposing the film stack to a plasma that includes fluorine agents, nitrogen agents, and hydrogen agents. The plasma etches the first germanium-containing layer and causes a passivation layer to be formed on exposed surfaces of the first silicon layer and the second silicon layer to inhibit etching of the first silicon layer and the second silicon layer during exposure of the film stack to the plasma.Type: ApplicationFiled: February 9, 2021Publication date: August 11, 2022Inventors: Pingshan Luan, Aelan Mosden
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Publication number: 20220238344Abstract: In certain embodiments, a method for processing a semiconductor substrate includes receiving a semiconductor substrate that includes a film stack. The film stack includes first and second germanium-containing layers and a first silicon layer positioned between the first and second germanium-containing layers. The method includes selectively etching the first silicon layer by exposing the film stack to a plasma that includes fluorine agents and nitrogen agents. The plasma etches the first silicon layer, and causes a passivation layer to be formed on exposed surfaces of the first and second germanium-containing layers to inhibit etching of the first and second germanium-containing layers during exposure of the film stack to the plasma.Type: ApplicationFiled: January 28, 2021Publication date: July 28, 2022Inventors: Pingshan Luan, Aelan Mosden
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Publication number: 20220238309Abstract: In certain embodiments, a method of processing a semiconductor substrate includes positioning a semiconductor substrate in a plasma chamber of a plasma tool. The semiconductor substrate includes a film stack that includes silicon layers and germanium-containing layers in an alternating stacked arrangement, with at least two silicon layers and at least two germanium-containing layers. The method includes exposing, in a first plasma step executed in the plasma chamber, the film stack to a first plasma. The first plasma is generated from first gases that include nitrogen gas, hydrogen gas, and fluorine gas. The method includes exposing, in a second plasma step executed in the plasma chamber, the film stack to a second plasma. The second plasma is generated from second gases comprising fluorine gas and oxygen gas. The second plasma selectively etches the silicon layers.Type: ApplicationFiled: January 22, 2021Publication date: July 28, 2022Inventors: Pingshan Luan, Christopher Catano, Aelan Mosden
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Patent number: 11380554Abstract: A method and system for the dry removal of a material on a microelectronic workpiece are described. The method includes receiving a workpiece having a surface exposing a target layer to be at least partially removed, placing the workpiece on a workpiece holder in a dry, non-plasma etch chamber, and selectively removing at least a portion of the target layer from the workpiece. The selective removal includes operating the dry, non-plasma etch chamber to perform the following: exposing the surface of the workpiece to a chemical environment at a first setpoint temperature in the range of 35 degrees C. to 100 degrees C. to chemically alter a surface region of the target layer, and then, elevating the temperature of the workpiece to a second setpoint temperature at or above 100 degrees C. to remove the chemically treated surface region of the target layer.Type: GrantFiled: February 11, 2020Date of Patent: July 5, 2022Assignee: TOKYO ELECTRON LIMITEDInventors: Subhadeep Kal, Nihar Mohanty, Angelique D. Raley, Aelan Mosden, Scott W. Lefevre
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Patent number: 11322350Abstract: Embodiments provide a non-plasma etch, such as a gas-phase and/or remote plasma etch, of titanium-containing material layers with tunable selectivity to other material layers. A substrate is received within a process chamber, and the substrate has exposed material layers including a titanium-containing material layer and at least one additional material layer. The additional material layer is selectively etched with respect to the titanium-containing material layer by exposing the substrate to a controlled environment including a halogen-containing gas. For one embodiment, the halogen-containing gas includes a fluorine-based gas. For one embodiment, the titanium-containing material layer is a titanium or a titanium nitride material layer. For one embodiment, the additional material layer includes tungsten, tungsten oxide, hafnium oxide, silicon oxide, silicon-germanium, silicon, silicon nitride, and/or aluminum oxide.Type: GrantFiled: May 6, 2020Date of Patent: May 3, 2022Assignee: TOKYO ELECTRON LIMITEDInventors: Daisuke Ito, Subhadeep Kal, Shinji Irie, Aelan Mosden
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Patent number: 11189499Abstract: Methods for the atomic layer etch (ALE) of tungsten or other metal layers are disclosed that use in part sequential oxidation and reduction of tungsten/metal layers to achieve target etch parameters. For one embodiment, a metal layer is first oxidized to form a metal oxide layer and an underlying metal layer. The metal oxide layer is then reduced to form a surface metal layer and an underlying metal oxide layer. The surface metal layer is then removed to leave the underlying metal oxide layer and the underlying metal layer. Further, the oxidizing, reducing, and removing processes can be repeated to achieve a target etch depth. In addition, a target etch rate can also achieved for each process cycle of oxidizing, reducing, and removing.Type: GrantFiled: February 27, 2020Date of Patent: November 30, 2021Assignee: TOKYO ELECTRON LIMITEDInventors: Yu-Hao Tsai, Du Zhang, Mingmei Wang, Aelan Mosden, Matthew Flaugh
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Publication number: 20210217628Abstract: A method for the dry removal of a material on a microelectronic workpiece is described. The method includes receiving a workpiece having a surface exposing a target layer composed of silicon and either (1) organic material or (2) both oxygen and nitrogen, and selectively removing at least a portion of the target layer from the workpiece. The selective removal includes exposing the surface of the workpiece to a chemical environment containing N, H, and F at a first setpoint temperature to chemically alter a surface region of the target layer, and then, elevating the temperature of the workpiece to a second setpoint temperature to remove the chemically treated surface region of the target layer.Type: ApplicationFiled: March 31, 2021Publication date: July 15, 2021Applicant: Tokyo Electron LimitedInventors: Subhadeep KAL, Nihar Mohanty, Angelique D. Raley, Aelan Mosden, Scott W. Lefevre
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Patent number: 10971372Abstract: A method for the dry removal of a material on a microelectronic workpiece is described. The method includes receiving a workpiece having a surface exposing a target layer composed of silicon and either (1) organic material or (2) both oxygen and nitrogen, and selectively removing at least a portion of the target layer from the workpiece. The selective removal includes exposing the surface of the workpiece to a chemical environment containing N, H, and F at a first setpoint temperature to chemically alter a surface region of the target layer, and then, elevating the temperature of the workpiece to a second setpoint temperature to remove the chemically treated surface region of the target layer.Type: GrantFiled: June 24, 2016Date of Patent: April 6, 2021Assignee: TOKYO ELECTRON LIMITEDInventors: Subhadeep Kal, Nihar Mohanty, Angelique D. Raley, Aelan Mosden, Scott W. Lefevre