Abstract: Die-attach materials for semiconductor device packages are provided. In one example, a semiconductor device package includes a submount. The semiconductor device package includes a semiconductor die comprising a wide bandgap semiconductor. The semiconductor device package includes a die-attach layer between the submount and the semiconductor die. The die-attach layer comprises gold (Au), tin (Sn), and cobalt (Co).

Abstract: Semiconductor packages are provided. In one example, the semiconductor package includes a submount. The semiconductor package further includes a recess in the submount. The recess includes a bottom surface defining a recess plane. The recess further includes at least one stud protrusion extending from the recess plane. The semiconductor package further includes a semiconductor die on the at least one stud protrusion.

Abstract: Semiconductor packages are provided. In one example, a semiconductor package includes a submount. The semiconductor package further includes a semiconductor die on the submount. The submount defines a base plane, and the submount includes at least one stud protrusion extending from the base plane in a direction toward the semiconductor die.

Abstract: Semiconductor packages are provided. In one example, a semiconductor package includes a submount and a semiconductor die attached to the submount using a die-attach material. The semiconductor die includes a sidewall having at least one fillet reduction feature. The at least one fillet reduction feature is configured to limit a fillet height of the die-attach material along the sidewall of the semiconductor die.

Abstract: Semiconductor devices and methods are provided. In one example, a semiconductor device includes an active region comprising one or more active semiconductor cells. The semiconductor device includes a metallization structure on the active region. The metallization structure includes beryllium.

Abstract: A device may include device parts, a composite coating material arranged on one or more of the device parts, and a molding compound arranged on and/or around one or more of the device parts. Moreover, the device may include where the composite coating material may include a polymer matrix including and/or incorporating ceramic particles.

Abstract: A device includes device parts, a diamond-like based material coating arranged on one or more of the device parts. Additionally, the diamond-like based material coating may include at least one of a diamond-like carbon (DLC) material and/or a diamond-like nanocomposite (DLN) material.

Abstract: Die attach materials are provided. In one example, the die-attach material includes a plurality of core-shell particles. Each core-shell particle includes a core and a shell on the core. The core includes a conducting material. The shell includes a metal nitride.

Abstract: Semiconductor packages are provided. In one example, a semiconductor package may include a substrate comprising a through hole extending through the substrate. The semiconductor package may include a semiconductor die on the substrate. The semiconductor die may be overlapping the through hole. The through hole in the substrate may be at least partially filled with an electroless deposited portion.

Abstract: A semiconductor device package includes a conductive submount, a metal layer comprising a first material on the conductive submount, and at least one conductive buffer layer comprising a second material on the metal layer. The conductive buffer layer may be between the metal layer and the conductive submount, or may be between the metal layer and a transistor die on the conductive submount. The second material of the conductive buffer layer has limited or no solid solubility with respect to the first material of the metal layer. Related packages and fabrication techniques are also discussed.

Abstract: Die-attach materials are provided. In one example, the die-attach material may include a plurality of core-shell particles. Each core-shell particle may include a core and a shell on the core. The core may include a conducting material. The shell may include an alloy. The alloy may include a first element and a second element. The second element may segregate into one or more grain boundaries in the die-attach material during bonding of the die-attach material.

Abstract: The development of air-stable unipolar n-type semiconductors with good solubility in organic solvents at room temperature remains a critical issue in the field of organic electronics. Moreover, most of the existing semiconducting materials exhibit LUMO energy levels higher than ?4.0 eV, making electron transport sensitive to both moisture and oxygen. Bis(2-oxoindolin-3-ylidene)benzodifurandione dicyanide or derivatives thereof are disclosed herein. More specifically, bis(2-oxoindolin-3-ylidene)benzodifurandione dicyanide or derivatives thereof for use in organic electronics are disclosed. A process for the preparation of bis(2-oxoindolin-3-ylidene)benzodifurandione dicyanide and derivatives is also disclosed. The bis(2-oxoindolin-3-ylidene)benzodifurandione dicyanide or derivatives thereof are characterized by high electron mobilities and are suitable for use as n-type semiconductors in organic electronics.

Abstract: The development of air-stable unipolar n-type semiconductors with good solubility in organic solvents at room temperature remains a critical issue in the field of organic electronics. Moreover, most of the existing semiconducting materials exhibit LUMO energy levels higher than ?4.0 eV, making electron transport sensitive to both moisture and oxygen. Bis(2-oxoindolin-3-ylidene)benzodifurandione dicyanide or derivatives thereof are disclosed herein. More specifically, bis(2-oxoindolin-3-ylidene)benzodifurandione dicyanide or derivatives thereof for use in organic electronics are disclosed. A process for the preparation of bis(2-oxoindolin-3-ylidene)benzodifurandione dicyanide and derivatives is also disclosed. The bis(2-oxoindolin-3-ylidene)benzodifurandione dicyanide or derivatives thereof are characterized by high electron mobilities and are suitable for use as n-type semiconductors in organic electronics.

Abstract: Disclosed is a method of printing ultranarrow-gap lines of a functional material, such as an electrically conductive silver ink. The method entails providing a substrate having an interlayer coated on the substrate and printing the ultranarrow-gap lines by depositing ink on the interlayer of the substrate, the ink comprising the functional material and a solvent that swells the interlayer to cause the interlayer to bulge at edges of the ink to thereby define embankments that confine the ink.

Abstract: Disclosed is a method of printing ultranarrow-gap lines of a functional material, such as an electrically conductive silver ink. The method entails providing a substrate having an interlayer coated on the substrate and printing the ultranarrow-gap lines by depositing ink on the interlayer of the substrate, the ink comprising the functional material and a solvent that swells the interlayer to cause the interlayer to bulge at edges of the ink to thereby define embankments that confine the ink.