Patents by Inventor Agarwala Sanjive

Agarwala Sanjive has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8549463
    Abstract: A die expansion bus efficiently couples a supplemental portion of a processing system to an original portion of the processing system on a die. The die expansion bus couples bus subsystems of the supplemental portion of the processing system to the bus subsystems of the original portion of the processing system. The original portion of the processing system is arranged to control the data resources of the supplemental portion of the processing system by accessing memory mapped control registers associated with the bus subsystems of the supplemental portion of the processing system.
    Type: Grant
    Filed: September 29, 2011
    Date of Patent: October 1, 2013
    Assignee: Texas Instruments Incorporated
    Inventor: Agarwala Sanjive
  • Publication number: 20120084483
    Abstract: A die expansion bus efficiently couples a supplemental portion of a processing system to an original portion of the processing system on a die. The die expansion bus couples bus subsystems of the supplemental portion of the processing system to the bus subsystems of the original portion of the processing system. The original portion of the processing system is arranged to control the data resources of the supplemental portion of the processing system by accessing the memory endpoints associated with the bus subsystems of the supplemental portion of the processing system.
    Type: Application
    Filed: September 29, 2011
    Publication date: April 5, 2012
    Inventor: Agarwala Sanjive