Abstract: The uneven charge and discharge from non-collocated batteries within an HMD can be solved by monitoring the DC current on the paths coupled to the first battery and the second battery and making an adjustment in the path resistance to equalize, or at least reduce, the difference between the currents on the two paths. Aspects of the technology described herein monitor current on paths from two or more non-collocated batteries. When the currents are different, resistance is dynamically added to the path with the higher current to equalize the current in the two paths. The monitoring and resistance adjustment can occur during discharge from a battery to a load and during battery recharge.

Abstract: A dynamic power control circuit is provided. The control circuit can detect the presence of the external power source as well as detect one or more conditions of the device. For instance, the control circuit can detect a voltage difference between a first node coupling a first power output and a system circuit and a second node coupling a second power output and the batteries. The control circuit can also detect the activation or deactivation of the external power source. Based on the inputs, the control circuit can cause the controlled resistor to dynamically adjust a level of impedance between the first node and the second node. The controlled impedance between the first node and the second node enables the system circuit to dynamically utilize power supplied by the external power source as well as power supplied by the batteries.

Abstract: Embodiments are disclosed for a printed circuit board. An example printed circuit board includes a ground plane comprising a pattern of an electrically conductive material. The example printed circuit board further includes a circuit trace disposed adjacent to the ground plane, where one or more characteristics of one of more of the pattern of the electrically conductive material in the ground plane and the circuit trace vary based upon a directional change of the circuit trace.

Abstract: An enhanced parallel protection circuit is provided. A system using separate battery packs in a parallel configuration is arranged with multiple protection circuit modules (PCMs). The PCMs are configured to detect fault conditions, such as over voltage, under voltage, excess current, excess heat, etc. Individual PCMs can be configured to control associated switches and/or other components. When a fault condition is detected by an individual PCM, the individual PCM triggers one or more associated switches to shut down one or more components. In addition, by the use of the techniques disclosed herein, the individual PCM can also trigger switches that are controlled by other PCMs. Configurations disclosed herein mitigate occurrences where a multi-PCM device is operating after at least one PCM has shut down. Configurations disclosed herein provide safeguards and redundant protection in scenarios where a fault event is detected by one PCM and not detected by another PCM in a parallel configuration.

Abstract: The uneven charge and discharge from non-collocated batteries within an HMD can be solved by monitoring the DC current on the paths coupled to the first battery and the second battery and making an adjustment in the path resistance to equalize, or at least reduce, the difference between the currents on the two paths. Aspects of the technology described herein monitor current on paths from two or more non-collocated batteries. When the currents are different, resistance is dynamically added to the path with the higher current to equalize the current in the two paths. The monitoring and resistance adjustment can occur during discharge from a battery to a load and during battery recharge.

Abstract: A power switching device (e.g., a power MOSFET) drives relatively large surges of pulsed power through a laser emitter of a Time of Flight (TOF) determining system where both the power switching device and laser emitter are closely packed on a printed circuit board having further closely packed and temperature sensitive other components. Waveforms of pulse trains that control the power switching device are programmably defined and thus may include pulse durations that are unduly large or spacing between pulses that are unduly small such that overheating may occur. A pulse duration limiting circuit is provided having an analog integrator configured to integrate over time, the programmably defined pulses and a voltage triggered clamping device coupled to an output of the analog integrator. The voltage triggered clamping device has a predetermined threshold voltage at and above which it is switched from a relatively low transconductances mode to a substantially higher transconductances mode.

Abstract: A dynamic power control circuit is provided. The control circuit can detect the presence of the external power source as well as detect one or more conditions of the device. For instance, the control circuit can detect a voltage difference between a first node coupling a first power output and a system circuit and a second node coupling a second power output and the batteries. The control circuit can also detect the activation or deactivation of the external power source. Based on the inputs, the control circuit can cause the controlled resistor to dynamically adjust a level of impedance between the first node and the second node. The controlled impedance between the first node and the second node enables the system circuit to dynamically utilize power supplied by the external power source as well as power supplied by the batteries.

Abstract: An enhanced parallel protection circuit is provided. A system using separate battery packs in a parallel configuration is arranged with multiple protection circuit modules (PCMs). The PCMs are configured to detect fault conditions, such as over voltage, under voltage, excess current, excess heat, etc. Individual PCMs can be configured to control associated switches and/or other components. When a fault condition is detected by an individual PCM, the individual PCM triggers one or more associated switches to shut down one or more components. In addition, by the use of the techniques disclosed herein, the individual PCM can also trigger switches that are controlled by other PCMs. Configurations disclosed herein mitigate occurrences where a multi-PCM device is operating after at least one PCM has shut down. Configurations disclosed herein provide safeguards and redundant protection in scenarios where a fault event is detected by one PCM and not detected by another PCM in a parallel configuration.

Abstract: A power switching device (e.g., a power MOSFET) drives relatively large surges of pulsed power through a laser emitter of a Time of Flight (TOF) determining system where both the power switching device and laser emitter are closely packed on a printed circuit board having further closely packed and temperature sensitive other components. Waveforms of pulse trains that control the power switching device are programmably defined and thus may include pulse durations that are unduly large or spacing between pulses that are unduly small such that overheating may occur. A pulse duration limiting circuit is provided having an analog integrator configured to integrate over time, the programmably defined pulses and a voltage triggered clamping device coupled to an output of the analog integrator. The voltage triggered clamping device has a predetermined threshold voltage at and above which it is switched from a relatively low transconductances mode to a substantially higher transconductances mode.

Abstract: Embodiments are disclosed for a printed circuit board. An example printed circuit board includes a ground plane comprising a pattern of an electrically conductive material. The example printed circuit board further includes a circuit trace disposed adjacent to the ground plane, where one or more characteristics of one of more of the pattern of the electrically conductive material in the ground plane and the circuit trace vary based upon a directional change of the circuit trace.