Abstract: A design and method for controlling the initial inductor current in a DC/DC switching regulator. The Ton or Toff time, depending upon implementation, is gradually increased such that power applied to a load is initially constrained until the system reaches a stable state, at which time normal power is connected to the load. In an embodiment, the on or off time is limited by a circuit which controls a pair of complementary transistors. The states of the transistors are controlled by the use of a startup-phase voltage and a reference voltage, which are then compared in an error amplifier. The result of the comparison is compared to a sawtooth signal in a comparator, the output of which controls the state of complementary transistors.

Abstract: A pulse regulation loop for a clocked switching power converter where the loop is around a bridge converter. The loop features a comparator, a charge pump and a filter in series, feeding a pulse modulator controlling the clock duty cycle of the bridge. Ripple in the bridge converter output is feed to the comparator which causes the charge pump to inject or remove charge from the filter at the clock rate providing control over the modulator that establishes converter efficiency. The charge pump is of the PLL type, having switches responsive to voltage output from the comparator, evaluating the converter ripple relative to a reference voltage.

Abstract: An energy harvesting system receives a low power input from an energy harvesting device such as a photovoltaic device or similar, and controls the storage of power in power management logic. The stored power eventually reaches a level that permits it to be supplied to power conversion block for supply of a regulated voltage to a load.

Abstract: A control loop for a clocked switching power converter where the loop features a comparator (44) and a filter (61) in series to linearize the nonlinear response of the comparator (44). The filter (61) has poles and zeros offsetting the poles and zeros of a bridge rectifier (M1 and M2).

Abstract: A power-supply-independent clock, with controlled THigh and TLow that permits both frequency and duty cycle to be set simultaneously and independently. Depending upon the implementation, the control values can be varied for frequency and duty cycle as determined by the user, or can be dependent upon temperature, power supply variations, or any other variable within the system, design or device that includes the clock.

Abstract: A pulse regulation loop for a clocked switching power converter where the loop is around a bridge converter. The loop features a comparator, a charge pump and a filter in series, feeding a pulse modulator controlling the clock duty cycle of the bridge. Ripple in the bridge converter output is feed to the comparator which causes the charge pump to inject or remove charge from the filter at the clock rate providing control over the modulator that establishes converter efficiency. The charge pump is of the PLL type, having switches responsive to voltage output from the comparator, evaluating the converter ripple relative to a reference voltage.

Abstract: A pulse regulation loop for a clocked switching power converter where the loop is around a bridge converter. The loop features a comparator, a charge pump and a filter in series, feeding a pulse modulator controlling the clock duty cycle of the bridge. Ripple in the bridge converter output is feed to the comparator which causes the charge pump to inject or remove charge from the filter at the clock rate providing control over the modulator that establishes converter efficiency. The charge pump is of the PLL type, having switches responsive to voltage output from the comparator, evaluating the converter ripple relative to a reference voltage.

Abstract: A control loop for a clocked switching power converter where the loop features a comparator (44) and a filter (61) in series to linearize the nonlinear response of the comparator (44). The filter (61) has poles and zeros offsetting the poles and zeros of a bridge rectifier (M1 and M2).

Abstract: A control loop for a clocked switching power converter where the loop features a comparator (44) and a filter (61) in series to linearize the nonlinear response of the comparator (44). The filter (61) has poles and zeros offsetting the poles and zeros of a bridge rectifier (M1 and M2).

Abstract: A pulse regulation loop for a clocked switching power converter where the loop is around a bridge converter. The loop features a comparator, a charge pump and a filter in series, feeding a pulse modulator controlling the clock duty cycle of the bridge. Ripple in the bridge converter output is feed to the comparator which causes the charge pump to inject or remove charge from the filter at the clock rate providing control over the modulator that establishes converter efficiency. The charge pump is of the PLL type, having switches responsive to voltage output from the comparator, evaluating the converter ripple relative to a reference voltage.