Patents by Inventor Ahmad Zainal Amrie Bin Shaari

Ahmad Zainal Amrie Bin Shaari has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Microelectronic device testing, and associated methods, devices, and systems
    Patent number: 11367495
    Abstract: Memory devices are disclosed. A memory device may include a memory array including a number of column planes and at least one circuit coupled to the memory array. The at least one circuit may generate test result data for a column address for each column plane of the number of column planes. The at least one circuit may further convert the test result data to a first result responsive to two or more of the column planes failing the test. The at least one circuit may also convert the test result data to a second result responsive to no column planes failing the test. Further, the at least one circuit may convert the test result data to a third result responsive to one column plane failing the test. The third result may identify the one column plane. Methods of testing a memory device, and electronic systems are also disclosed.
    Type: Grant
    Filed: February 5, 2020
    Date of Patent: June 21, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Ahmad Zainal Amrie Bin Shaari, Hideyuki Ichida
  • MICROELECTRONIC DEVICE TESTING, AND ASSOCIATED METHODS, DEVICES, AND SYSTEMS
    Publication number: 20210241842
    Abstract: Memory devices are disclosed. A memory device may include a memory array including a number of column planes and at least one circuit coupled to the memory array. The at least one circuit may generate test result data for a column address for each column plane of the number of column planes. The at least one circuit may further convert the test result data to a first result responsive to two or more of the column planes failing the test. The at least one circuit may also convert the test result data to a second result responsive to no column planes failing the test. Further, the at least one circuit may convert the test result data to a third result responsive to one column plane failing the test. The third result may identify the one column plane. Methods of testing a memory device, and electronic systems are also disclosed.
    Type: Application
    Filed: February 5, 2020
    Publication date: August 5, 2021
    Inventors: Ahmad Zainal Amrie Bin Shaari, Hideyuki Ichida