Abstract: Structures having backside high voltage capacitors for front side GaN-based devices are described. In an example, an integrated circuit structure includes a front side structure including a GaN-based device layer, and one or more metallization layers above the GaN-based device layer. A backside structure is below and coupled to the GaN-based layer, the backside structure including metal layers and one or more alternating laterally-recessed metal insulator metal capacitors.

Abstract: Gallium nitride (GaN) devices with through-silicon vias for integrated circuit technology are described. In an example, an integrated circuit structure includes a layer including gallium and nitrogen, the layer including gallium and nitrogen above a silicon substrate. A backside structure is below the silicon substrate and opposite the layer including gallium and nitrogen, the backside structure including conductive features and dielectric structures. The integrated circuit structure also includes a plurality of through-silicon via power bars having a staggered arrangement, individual ones of the through-silicon via power bars extending through the layer including gallium and nitrogen and through the silicon substrate to a corresponding one of the conductive features of the backside structure, and individual ones of the through-silicon via power bars having a tapered portion coupled to an essentially vertical portion.

Abstract: Devices, transistor structures, systems, and techniques are described herein related to low aluminum concentration aluminum gallium nitride interlayers for group III-nitride enhancement mode transistors. The low aluminum concentration aluminum gallium nitride interlayer includes a lower aluminum concentration than a polarization layer of the transistor, such that the polarization layer induces a two-dimensional electron gas in a semiconductor layer of the transistor. The low aluminum concentration aluminum gallium nitride interlayer may be implemented as an etch stop layer, as a gate liner, or both.

Abstract: A semiconductor device having an electric field management layer. The electric field management layer comprises a material with a relatively high dielectric constant that minimizes the risk of an electric field within the semiconductor device breaking down and damaging the semiconductor device.

Abstract: Gallium nitride (GaN) transistors with lateral depletion for integrated circuit technology are described. In an example, an integrated circuit structure includes a layer including gallium and nitrogen above a silicon substrate, a gate structure over the layer including gallium and nitrogen, a source region on a first side of the gate structure, a drain region on a second side of the gate structure, and a source field plate laterally between the gate structure and the drain region, the source field plate laterally separated from the gate structure.