Abstract: Various examples are provided examples related to resistive content addressable memory (RCAM) based in-memory computation architectures. In one example, a system includes a content addressable memory (CAM) including an array of cells having a memristor based crossbar and an interconnection switch matrix having a gateless memristor array, which is coupled to an output of the CAM. In another example, a method, includes comparing activated bit values stored a key register with corresponding bit values in a row of a CAM, setting a tag bit value to indicate that the activated bit values match the corresponding bit values, and writing masked key bit values to corresponding bit locations in the row of the CAM based on the tag bit value.

Abstract: Various examples are provided examples related to resistive content addressable memory (RCAM) based in-memory computation architectures. In one example, a system includes a content addressable memory (CAM) including an array of cells having a memristor based crossbar and an interconnection switch matrix having a gateless memristor array, which is coupled to an output of the CAM. In another example, a method, includes comparing activated bit values stored a key register with corresponding bit values in a row of a CAM, setting a tag bit value to indicate that the activated bit values match the corresponding bit values, and writing masked key bit values to corresponding bit locations in the row of the CAM based on the tag bit value.

Abstract: A method of processing an in-phase signal component and a quadrature signal component of a low intermediate frequency (LIF) signal includes estimating and correcting an amplitude imbalance between a digitized in-phase signal component and a digitized quadrature signal component at a first point in time, and estimating and correcting a phase imbalance between the digitized in-phase signal component and the digitized quadrature signal component at a second point in time in response to the correcting process. The digitized in-phase signal component corresponds to the in-phase signal component at the first point in time and the digitized quadrature signal component corresponds to the quadrature signal component at the first point in time. The second point in the time is subsequent to the first point in time.

Abstract: A method of processing an in-phase signal component and a quadrature signal component of a low intermediate frequency (LIF) signal includes estimating and correcting an amplitude imbalance between a digitized in-phase signal component and a digitized quadrature signal component at a first point in time, and estimating and correcting a phase imbalance between the digitized in-phase signal component and the digitized quadrature signal component at a second point in time in response to the correcting process. The digitized in-phase signal component corresponds to the in-phase signal component at the first point in time and the digitized quadrature signal component corresponds to the quadrature signal component at the first point in time. The second point in the time is subsequent to the first point in time.

Abstract: A universal rake receiver architecture includes modular independent processing units that can be flexibly programmed to support different modes of operation. The processing units are capable of performing the basic correlation calculations of DS-CDMA and each unit has an internal local memory and controller that controls its mode of operation. Each unit performs the required synchronization and demodulation operations for a multipath of a signal in the digital domain using all-digital frequency and timing correction techniques. Frequency feedback need not be supplied to the analog section of the receiver. Interpolation most preferably is used to find the optimum sampling position of each incoming chip. This independence allows the receiver to be used with one to several antennas without design modifications.

Abstract: A universal rake receiver architecture includes modular independent processing units that can be flexibly programmed to support different modes of operation. The processing units are capable of performing the basic correlation calculations of DS-CDMA and each unit has an internal local memory and controller that controls its mode of operation. Each unit performs the required synchronization and demodulation operations for a multipath of a signal in the digital domain using all-digital frequency and timing correction techniques. Frequency feedback need not be supplied to the analog section of the receiver. Interpolation most preferably is used to find the optimum sampling position of each incoming chip. This independence allows the receiver to be used with one to several antennas without design modifications.