Patents by Inventor Ahmed Hamed Fathi Hamed

Ahmed Hamed Fathi Hamed has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230069262
    Abstract: A computing system implementing a physical verification tool can determine principal feature components describing geometric patterns around points of interest in a semiconductor layout design. The principal feature components include topological features indicating whether structures are present around the points of interest, and include dimensional features corresponding to measurements associated with the structures present around the points of interest. The physical verification tool can generate a topological signature for each of the points of interest based on the topological features, and cluster the points of interest into different subsets based on the topological signature.
    Type: Application
    Filed: August 30, 2021
    Publication date: March 2, 2023
    Inventors: Hazem Hegazy, Ahmed Hamed Fathi Hamed, Omar ElSewefy, Sara Khalaf
  • Publication number: 20220309222
    Abstract: Systems and methods for analyzing a semiconductor layout design around a point of interest (POI) are disclosed. Semiconductor layout designs are a representation of an integrated circuit in terms of planar geometric shapes which make up the components of the integrated circuit, and are used to manufacture the integrated circuit. The layout design may be analyzed using one or more POI-based approaches to determine whether to modify the layout design. In one POI-based approach, set of kernels, tailored to the downstream application, are convolved with a representation of the layout design about or around the POI in order to generate a signature associated with the POI. In turn, the signatures may be analyzed based on the downstream application. Another POI-based approach consists of analyzing geometrical parameters associated with the POI, which may be used during a design stage to identify and modify problem areas in the layout design.
    Type: Application
    Filed: August 30, 2019
    Publication date: September 29, 2022
    Inventors: David A. Abercrombie, Mohamed Alimam Mohamed Selim, Mohamed Bahnas, Hazem Hegazy, Ahmed Hamed Fathi Hamed
  • Patent number: 11017147
    Abstract: System and methods for an edge-based camera are disclosed. Semiconductor layout designs are a representation of an integrated circuit that are used to manufacture the integrated circuit. Parts of the layout design, such as points of Interest (POIs), may be subject to analysis with regard to a downstream application, such as hotspot detection. Unlike pixel-based characterizations, POIs are characterized using topological features indicative of quantized values and dimensional features indicative of analog values. For example, an edge may be characterized using a set of relations, which characterizes corners and polygons (including the polygon on which the POI resides and external polygons). In turn, the set of relations may be used to define image representations, including images in different directions relative to the POI (including cardinal and ordinal image). In this way, the topological/dimensional characterization of the POI may be used to analyze the POI in the layout design.
    Type: Grant
    Filed: August 30, 2019
    Date of Patent: May 25, 2021
    Assignee: Siemens Industry Software Inc.
    Inventors: Hazem Hegazy, Ahmed Hamed Fathi Hamed, Omar Elsewefy