Patents by Inventor Ahmed Mohieldin

Ahmed Mohieldin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9191020
    Abstract: Communications data interface sampling systems configured effectively with fully-symmetric dual-loop traveling wave oscillators providing high frequency evenly spaced multiple phases to represent analog-in-nature continuous signals as digital stream of samples with best approximation to the original signal.
    Type: Grant
    Filed: February 5, 2014
    Date of Patent: November 17, 2015
    Assignee: WAVEWORKS, INC.
    Inventors: Ahmet Tekin, Ahmed Emira, Suat Utku Ay, Enver Cavus, Ahmed Mohieldin
  • Publication number: 20150222287
    Abstract: Communications data interface sampling systems configured effectively with fully-symmetric dual-loop traveling wave oscillators providing high frequency evenly spaced multiple phases to represent analog-in-nature continuous signals as digital stream of samples with best approximation to the original signal.
    Type: Application
    Filed: February 5, 2014
    Publication date: August 6, 2015
    Inventors: Ahmet Tekin, Ahmed Emira, Suat Utku Ay, Enver Cavus, Ahmed Mohieldin
  • Patent number: 7151473
    Abstract: A receiver 100 is provided. The receiver 100 comprises an in-phase analog-to-digital converter 112 operable to detect a saturation condition of the in-phase analog-to-digital converter 112 and to adjust the amplitude of a in-phase signal processed by the in-phase analog-to-digital converter 112 to remove the in-phase analog-to-digital converter 112 from the saturation condition and a in-phase digital filter 114 operable to adjust a gain applied to a digital input to the in-phase digital filter 114 from the in-phase analog-to-digital converter 112, the adjustment of the gain substantially inversely proportional to the adjustment of the amplitude of the in-phase signal processed by the in-phase analog-to-digital converter 112. In an embodiment, the receiver 100 also comprises a quadrature path that is substantially similar to the in-phase path, and the in-phase path and the quadrature path comprise a direct conversion receiver.
    Type: Grant
    Filed: August 15, 2005
    Date of Patent: December 19, 2006
    Assignee: Texas Instruments Incorporated
    Inventors: Paul H. Fontaine, Ahmed Mohieldin, Pascal Audinot, Abdellatif Bellaouar, Mikael Guenais
  • Publication number: 20060055579
    Abstract: A receiver 100 is provided. The receiver 100 comprises an in-phase analog-to-digital converter 112 operable to detect a saturation condition of the in-phase analog-to-digital converter 112 and to adjust the amplitude of a in-phase signal processed by the in-phase analog-to-digital converter 112 to remove the in-phase analog-to-digital converter 112 from the saturation condition and a in-phase digital filter 114 operable to adjust a gain applied to a digital input to the in-phase digital filter 114 from the in-phase analog-to-digital converter 112, the adjustment of the gain substantially inversely proportional to the adjustment of the amplitude of the in-phase signal processed by the in-phase analog-to-digital converter 112. In an embodiment, the receiver 100 also comprises a quadrature path that is substantially similar to the in-phase path, and the in-phase path and the quadrature path comprise a direct conversion receiver.
    Type: Application
    Filed: August 15, 2005
    Publication date: March 16, 2006
    Applicant: Texas Instruments Incorporated
    Inventors: Paul Fontaine, Ahmed Mohieldin, Pascal Audinot, Abdellatif Bellaouar, Mikael Guenais
  • Publication number: 20050068213
    Abstract: A continuous time sigma delta modulator having minimal excess loop delay. The continuous-time sigma delta modulator in accordance with the present invention includes at least one integrator stage coupled to receive an input signal and a resultant integrator output signal from a previous stage for providing a resultant integrator output. At least one output stage connects to the at least one integrator stage to receive the resultant integrator output signal from the previous integrator stage for providing a resultant integrator output. A sample and hold circuit connects to receive the second integrator input signal. A multiplier connects to the sample and hold circuit to provide a resultant sampled signal. An analog-to-digital converter quantizer couples to receive the resultant sampled signal and to produce a quantized output signal.
    Type: Application
    Filed: July 29, 2004
    Publication date: March 31, 2005
    Inventors: Paul-Aymeric Fontaine, Ahmed Mohieldin