Patents by Inventor Ahmed Sayed Abbas Metawea

Ahmed Sayed Abbas Metawea has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220182103
    Abstract: Techniques are described for accurate tracking of a radiofrequency (RF) carrier for amplitude-modulated signals in unstable reference clock environments. For example, some embodiments operate in context of clock circuits in devices configured for near-field communication (NFC) card emulation (CE) mode. The clock circuits seek to generate an internal clocking signal by tracking a clock reference, such as an RF carrier. In some cases, the clock reference can unpredictably become unreliable for periods of time, during which continued tracking of the unreliable clock reference and/or improper reacquisition can yield appreciable frequency and phase errors in the generated internal clocking signal. Some embodiments implement phase delta detection with time limiting to limit the magnitude of such errors in the internal clocking signal introduced while tracking an unreliable clock reference. Other embodiments provide feedback-pause-control (FPC) to force proper clock reference reacquisition.
    Type: Application
    Filed: December 3, 2020
    Publication date: June 9, 2022
    Inventor: Ahmed Sayed Abbas METAWEA
  • Patent number: 11356147
    Abstract: Techniques are described for accurate tracking of a radiofrequency (RF) carrier for amplitude-modulated signals in unstable reference clock environments. For example, some embodiments operate in context of clock circuits in devices configured for near-field communication (NFC) card emulation (CE) mode. The clock circuits seek to generate an internal clocking signal by tracking a clock reference, such as an RF carrier. In some cases, the clock reference can unpredictably become unreliable for periods of time, during which continued tracking of the unreliable clock reference and/or improper reacquisition can yield appreciable frequency and phase errors in the generated internal clocking signal. Some embodiments implement phase delta detection with time limiting to limit the magnitude of such errors in the internal clocking signal introduced while tracking an unreliable clock reference. Other embodiments provide feedback-pause-control (FPC) to force proper clock reference reacquisition.
    Type: Grant
    Filed: December 3, 2020
    Date of Patent: June 7, 2022
    Assignee: Shenzhen Goodix Technology Co., Ltd.
    Inventor: Ahmed Sayed Abbas Metawea
  • Patent number: 11252550
    Abstract: Techniques are described for frequency-division-coordination of automatic power control (APC) in a transceiver of a near-field reader. Such frequency-division-coordinated APC (FDC-APC) can enable continuous APC updates concurrent with communication frames to achieve field strength specifications without conventional degradations in communication reliability. For example, a transceiver implements a FDC-APC loop that received a detuning signal from signals received and/or transmitted over a near-field communication link, generates an error signal by comparing the detuning signal with a reference detuning level, and updates a power control signal according to an update frequency (e.g., corresponding to a APC loop bandwidth) that is a function of at least a filter frequency profile and is out-of-band with respect to a modulation frequency band. Modulated signals can be transmitted over the near-field communication link according to variable power settings controlled to the power control signal.
    Type: Grant
    Filed: December 3, 2020
    Date of Patent: February 15, 2022
    Assignee: SHENZHEN GOODIX TECHNOLOGY CO., LTD.
    Inventors: Nabil Sinoussi, Michael Sherif Sobhy Nagib, Ahmed Sayed Abbas Metawea
  • Patent number: 11108537
    Abstract: Techniques are described for accurate tracking of a radiofrequency (RF) carrier for amplitude-modulated signals in unstable reference clock environments. For example, some embodiments operate in context of clock circuits in devices configured for near-field communication (NFC) card emulation (CE) mode. The clock circuits seek to generate an internal clocking signal by tracking a clock reference, such as an RF carrier. In some cases, the clock reference can unpredictably become unreliable for periods of time, during which continued tracking of the unreliable clock reference can yield appreciable frequency and phase errors in the generated internal clocking signal. Embodiments implement phase delta detection with time limiting to limit the magnitude of such errors in the internal clocking signal introduced while tracking an unreliable clock reference.
    Type: Grant
    Filed: December 3, 2020
    Date of Patent: August 31, 2021
    Assignee: SHENZHEN GOODIX TECHNOLOGY CO., LTD.
    Inventor: Ahmed Sayed Abbas Metawea