Abstract: A method of performing static timing analysis for a circuit design includes, in part, identifying a multitude of logic blocks of the circuit design matching a design pattern; determining values of a multitude of electrical properties associated with a first logic block representative of each of the plurality of logic blocks; and determining, during the static timing analysis, a delay associated with each of the multitude of logic blocks using the values of the electrical properties.

Abstract: An equivalent input characterization waveform (EICW) is determined for a channel-connected block (CCB) located on a boundary of a cell, for a specific waveform of interest. The EICW and the specific waveform of interest produce a same timing characteristic of the CCB, but the EICW belongs to a set of waveforms on which a behavioral timing model for the multi-stage cell is based whereas the specific waveform of interest is not so limited. A timing response of the multi-stage cell is then estimated based on applying the EICW.

Abstract: Disclosed is a method and apparatus that determines receiver capacitance values for a receiver cell from a multi-segment receiver capacitance model (C1Cn) model. Values for receiver capacitance are determined from a Composite Current Source for Noise (CCSN) model under conditions used to attain receiver capacitance values for the C1Cn model Difference values for the difference between the values from the CCSN model and from the C1Cn model are determined. Calibration factors are iteratively applied to parameters of the CCSN model to obtain a minimum difference value for difference between receiver capacitance values from the CCSN model and receiver capacitance values from the C1Cn model. Calibration factor values that result in the difference value being within an acceptable range are stored.

Abstract: A system and a method are disclosed for performing static timing analysis. Information describing a distorted input waveform is received by a static timing analyzer. A transition time of the distorted input waveform is determined. Based on the determined input transition time a nominal input waveform and a corresponding nominal output waveform are received. An input waveform distortion is computed based on the nominal input waveform and the distorted input waveform. An output waveform distortion is computed based on an augmented circuit and the input waveform distortion. A distorted output waveform is computed based on the nominal output waveform and the output waveform distortion. The waveforms are represented using the distortion values which are smaller than the actual waveform values, thereby allowing for compact representation. A time-shifted version of an uncoupled input waveform is used to perform conservative timing analysis of circuits that accounts for crosstalk in the circuit.

Abstract: A system and a method are disclosed for performing static timing analysis. Information describing a distorted input waveform is received by a static timing analyzer. A transition time of the distorted input waveform is determined. Based on the determined input transition time a nominal input waveform and a corresponding nominal output waveform are received. An input waveform distortion is computed based on the nominal input waveform and the distorted input waveform. An output waveform distortion is computed based on an augmented circuit and the input waveform distortion. A distorted output waveform is computed based on the nominal output waveform and the output waveform distortion. The waveforms are represented using the distortion values which are smaller than the actual waveform values, thereby allowing for compact representation. A time-shifted version of an uncoupled input waveform is used to perform conservative timing analysis of circuits that accounts for crosstalk in the circuit.