Patents by Inventor Ai-Hsuan Liu

Ai-Hsuan Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9473157
    Abstract: A frequency synthesizer includes a phase-locked loop (PLL) and a loop bandwidth controller. The PLL generates an output clock according to a reference clock. The loop bandwidth controller checks at least one indicator indicative of injection pulling/pushing of the PLL to configure a loop bandwidth of the PLL. In one exemplary design, the loop bandwidth controller sets the loop bandwidth of the PLL by controlling a configuration of a loop filter included in the PLL. For example, the PLL is an all-digital phase-locked loop (ADPLL), and the loop filter is a digital loop filter of the ADPLL.
    Type: Grant
    Filed: July 24, 2014
    Date of Patent: October 18, 2016
    Assignee: MEDIATEK INC.
    Inventors: Chun-Ming Kuo, Chii-Horng Chen, Shih-Chi Shen, Ai-Hsuan Liu
  • Publication number: 20160028411
    Abstract: A frequency synthesizer includes a phase-locked loop (PLL) and a loop bandwidth controller. The PLL generates an output clock according to a reference clock. The loop bandwidth controller checks at least one indicator indicative of injection pulling/pushing of the PLL to configure a loop bandwidth of the PLL. In one exemplary design, the loop bandwidth controller sets the loop bandwidth of the PLL by controlling a configuration of a loop filter included in the PLL. For example, the PLL is an all-digital phase-locked loop (ADPLL), and the loop filter is a digital loop filter of the ADPLL.
    Type: Application
    Filed: July 24, 2014
    Publication date: January 28, 2016
    Inventors: Chun-Ming Kuo, Chii-Horng Chen, Shih-Chi Shen, Ai-Hsuan Liu