Abstract: A semiconductor device assembly is provided. The semiconductor device assembly includes a package substrate and a silicon spacer disposed on an upper surface of the substrate, the silicon spacer having a plurality of trenches extending into the silicon spacer from a top surface thereof. The semiconductor device assembly further includes one or more semiconductor devices disposed over the silicon spacer. Moreover, the semiconductor device assembly includes an encapsulant material at least partially encapsulating the one or more semiconductor devices and the package substrate, the encapsulant material at least partially filling the plurality of trenches of the silicon spacer.

Abstract: A bond pad with micro-protrusions for direct metallic bonding. In one embodiment, a semiconductor device comprises a semiconductor substrate, a through-silicon via (TSV) extending through the semiconductor substrate, and a copper pad electrically connected to the TSV and having a coupling side. The semiconductor device further includes a copper element that projects away from the coupling side of the copper pad. In another embodiment, a bonded semiconductor assembly comprises a first semiconductor substrate with a first TSV and a first copper pad electrically coupled to the first TSV, wherein the first copper pad has a first coupling side. The bonded semiconductor assembly further comprises a second semiconductor substrate, opposite to the first semiconductor substrate, the second semiconductor substrate comprising a second copper pad having a second coupling side. A plurality of copper connecting elements extend between the first and second coupling sides of the first and second copper pads.

Abstract: A bond pad with micro-protrusions for direct metallic bonding. In one embodiment, a semiconductor device comprises a semiconductor substrate, a through-silicon via (TSV) extending through the semiconductor substrate, and a copper pad electrically connected to the TSV and having a coupling side. The semiconductor device further includes a copper element that projects away from the coupling side of the copper pad. In another embodiment, a bonded semiconductor assembly comprises a first semiconductor substrate with a first TSV and a first copper pad electrically coupled to the first TSV, wherein the first copper pad has a first coupling side. The bonded semiconductor assembly further comprises a second semiconductor substrate, opposite to the first semiconductor substrate, the second semiconductor substrate comprising a second copper pad having a second coupling side. A plurality of copper connecting elements extend between the first and second coupling sides of the first and second copper pads.

Abstract: A semiconductor device can include a semiconductor substrate singulated from a device wafer having had multiple semiconductor devices formed thereon. The semiconductor substrate can include a first corner, a first sidewall extends in a first direction from the first corner, and a second sidewall extending in a second direction from the first corner. The first sidewall can include a first laser modification extending along the first direction and the second sidewall can include a second laser modification extending along the second direction. A portion of the second sidewall between the first corner and the second laser modification can (i) exclude laser modification, or (ii) the second laser modification can be offset from the first corner along the second direction.

Abstract: A semiconductor device assembly is provided. The semiconductor device assembly includes a package substrate and a silicon spacer disposed on an upper surface of the substrate, the silicon spacer having a plurality of trenches extending into the silicon spacer from a top surface thereof. The semiconductor device assembly further includes one or more semiconductor devices disposed over the silicon spacer. Moreover, the semiconductor device assembly includes an encapsulant material at least partially encapsulating the one or more semiconductor devices and the package substrate, the encapsulant material at least partially filling the plurality of trenches of the silicon spacer.

Abstract: Provided is a method of purifying a protein of interest from a medium comprised of adsorbent and the protein, the method includes, inter alia, providing the medium of the protein, which is at least partially adsorbed into/onto the adsorbent, and performing pressure filtering to wash the adsorbent-adsorbed protein and/or to elute the protein from the adsorbent, thereby at least partially purifying the protein.

Abstract: The present invention is directed to hemostatic compositions comprising at least partially integrated agglomerated ORC fibers, fibrinogen, and thrombin and methods of forming a powdered hemostatic composition, comprising the steps of: forming a suspension of a mixture comprising particles of fibrinogen, thrombin, ORC fibers in a non-aqueous low boiling solvent, agitating and shearing said suspension in a high shear mixing reactor, adding water to allow particles to agglomerate, allowing the non-aqueous solvent to evaporate, drying and sieving the composition; and thus forming the powdered hemostatic composition.

Abstract: The present invention is directed to hemostatic compositions comprising at least partially integrated agglomerated ORC fibers, fibrinogen, and thrombin and methods of forming a powdered hemostatic composition, comprising the steps of: forming a suspension of a mixture comprising particles of fibrinogen, thrombin, ORC fibers in a non-aqueous low boiling solvent, agitating and shearing said suspension in a high shear mixing reactor, adding water to allow particles to agglomerate, allowing the non-aqueous solvent to evaporate, drying and sieving the composition; and thus forming the powdered hemostatic composition.

Abstract: A bond pad with micro-protrusions for direct metallic bonding. In one embodiment, a semiconductor device comprises a semiconductor substrate, a through-silicon via (TSV) extending through the semiconductor substrate, and a copper pad electrically connected to the TSV and having a coupling side. The semiconductor device further includes a copper element that projects away from the coupling side of the copper pad. In another embodiment, a bonded semiconductor assembly comprises a first semiconductor substrate with a first TSV and a first copper pad electrically coupled to the first TSV, wherein the first copper pad has a first coupling side. The bonded semiconductor assembly further comprises a second semiconductor substrate, opposite to the first semiconductor substrate, the second semiconductor substrate comprising a second copper pad having a second coupling side. A plurality of copper connecting elements extend between the first and second coupling sides of the first and second copper pads.

Abstract: A bond pad with micro-protrusions for direct metallic bonding. In one embodiment, a semiconductor device comprises a semiconductor substrate, a through-silicon via (TSV) extending through the semiconductor substrate, and a copper pad electrically connected to the TSV and having a coupling side. The semiconductor device further includes a copper element that projects away from the coupling side of the copper pad. In another embodiment, a bonded semiconductor assembly comprises a first semiconductor substrate with a first TSV and a first copper pad electrically coupled to the first TSV, wherein the first copper pad has a first coupling side. The bonded semiconductor assembly further comprises a second semiconductor substrate, opposite to the first semiconductor substrate, the second semiconductor substrate comprising a second copper pad having a second coupling side. A plurality of copper connecting elements extend between the first and second coupling sides of the first and second copper pads.

Abstract: Methods of making semiconductor device packages may involve cutting kerfs in streets between regions of a semiconductor wafer and positioning stacks of semiconductor dice on portions of surfaces of at least some adjacent regions. A protective material may be dispensed only between the stacks of the semiconductor dice, over the exposed remainders of the regions, and in the kerfs. A back side of the semiconductor wafer may be ground to a final thickness, revealing the protective material in the kerfs at a side of the semiconductor wafer opposite the stacks of the semiconductor dice. The protective material between the stacks of the semiconductor dice and within the kerfs may be cut through, leaving the protective material on sides of the semiconductor dice of the stacks and on side surfaces of the regions within the kerfs.

Abstract: Methods for forming semiconductor die assemblies with heat transfer features are disclosed herein. In some embodiments, the methods comprise providing a wafer having a first side and a second side opposite the first side, attaching a semiconductor die stack to the first side of the wafer, and forming a plurality of heat transfer features at the second side of the wafer. The heat transfer features can be defined by a plurality of grooves that define an exposed continuous surface of the wafer at the second side compared to a planar surface of the wafer.

Abstract: Methods of making semiconductor device packages may involve cutting kerfs in streets between regions of a semiconductor wafer and positioning stacks of semiconductor dice on portions of surfaces of at least some adjacent regions. A protective material may be dispensed only between the stacks of the semiconductor dice, over the exposed remainders of the regions, and in the kerfs. A back side of the semiconductor wafer may be ground to a final thickness, revealing the protective material in the kerfs at a side of the semiconductor wafer opposite the stacks of the semiconductor dice. The protective material between the stacks of the semiconductor dice and within the kerfs may be cut through, leaving the protective material on sides of the semiconductor dice of the stacks and on side surfaces of the regions within the kerfs.

Abstract: The present invention is directed to hemostatic compositions comprising at least partially integrated agglomerated ORC fibers, fibrinogen, and thrombin and methods of forming a powdered hemostatic composition, comprising the steps of: forming a suspension of a mixture comprising particles of fibrinogen, thrombin, ORC fibers in a non-aqueous low boiling solvent, agitating and shearing said suspension in a high shear mixing reactor, adding water to allow particles to agglomerate, allowing the non-aqueous solvent to evaporate, drying and sieving the composition; and thus forming the powdered hemostatic composition.

Abstract: Methods of protecting semiconductor devices may involve cutting partially through a thickness of a semiconductor wafer to form trenches between stacks of semiconductor dice on regions of integrated circuitry of the semiconductor wafer. A protective material may be dispensed into the trenches and to a level at least substantially the same as a height of the stacks of semiconductor dice. Material of the semiconductor wafer may be removed from a back side thereof at least to a depth sufficient to expose the protective material in the trenches. A remaining thickness of the protective material between the stacks of semiconductor dice may be cut through.

Abstract: Methods for forming semiconductor die assemblies with heat transfer features are disclosed herein. In some embodiments, the methods comprise providing a wafer having a first side and a second side opposite the first side, attaching a semiconductor die stack to the first side of the wafer, and forming a plurality of heat transfer features at the second side of the wafer. The heat transfer features can be defined by a plurality of grooves that define an exposed continuous surface of the wafer at the second side compared to a planar surface of the wafer.

Abstract: Semiconductor die assemblies with heat sinks are disclosed herein. In one embodiment, a semiconductor die assembly includes a stack of semiconductor dies and a mold material surrounding at least a portion of the stack of semiconductor dies. A heat sink is disposed on the stack of semiconductor dies and adjacent the mold material. The heat sink includes an exposed surface and a plurality of heat transfer features along the exposed surface that are configured to increase an exposed surface area compared to a planar surface.

Abstract: Methods of making semiconductor device packages may involve attaching a first semiconductor die to a carrier wafer, an inactive surface of the first semiconductor die facing the carrier wafer. One or more additional semiconductor die may be stacked on the first semiconductor die on a side of the first semiconductor die opposite the carrier wafer to form a stack of semiconductor dice. A protective material may be positioned over the stack of semiconductor dice, a portion of the protective material extending along side surfaces of the first semiconductor die to a location proximate the inactive surface of the first semiconductor die. The carrier wafer may be detached from the first semiconductor die.

Abstract: Methods of making semiconductor device packages may involve attaching a first semiconductor die to a carrier wafer, an inactive surface of the first semiconductor die facing the carrier wafer. One or more additional semiconductor die may be stacked on the first semiconductor die on a side of the first semiconductor die opposite the carrier wafer to form a stack of semiconductor dice. A protective material may be positioned over the stack of semiconductor dice, a portion of the protective material extending along side surfaces of the first semiconductor die to a location proximate the inactive surface of the first semiconductor die. The carrier wafer may be detached from the first semiconductor die.

Abstract: Methods of protecting semiconductor devices may involve cutting partially through a thickness of a semiconductor wafer to form trenches between stacks of semiconductor dice on regions of integrated circuitry of the semiconductor wafer. A protective material may be dispensed into the trenches and to a level at least substantially the same as a height of the stacks of semiconductor dice. Material of the semiconductor wafer may be removed from a back side thereof at least to a depth sufficient to expose the protective material in the trenches. A remaining thickness of the protective material between the stacks of semiconductor dice may be cut through.