Patents by Inventor Aibing Zhou

Aibing Zhou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230344920
    Abstract: This disclosure describes techniques for performing communications between devices using various aspects of Ethernet standards. As further described herein, a protocol is disclosed that may be used for communications between devices, where the communications take place over a physical connection complying with Ethernet standards. Such a protocol may enable reliable and in-order delivery of frames between devices, while following Ethernet physical layer rules, Ethernet symbol encoding, Ethernet lane alignment, and/or Ethernet frame formats.
    Type: Application
    Filed: June 27, 2023
    Publication date: October 26, 2023
    Applicant: Fungible, Inc.
    Inventors: Pradeep Sindhu, Deepak Goel, Srihari Raju Vegesna, Aibing Zhou, Shashi Kumar, Rohit Sunkam Ramanujam
  • Patent number: 11722585
    Abstract: This disclosure describes techniques for performing communications between devices using various aspects of Ethernet standards. As further described herein, a protocol is disclosed that may be used for communications between devices, where the communications take place over a physical connection complying with Ethernet standards. Such a protocol may enable reliable and in-order delivery of frames between devices, while following Ethernet physical layer rules, Ethernet symbol encoding, Ethernet lane alignment, and/or Ethernet frame formats.
    Type: Grant
    Filed: February 15, 2022
    Date of Patent: August 8, 2023
    Assignee: Fungible, Inc.
    Inventors: Pradeep Sindhu, Deepak Goel, Srihari Raju Vegesna, Aibing Zhou, Shashi Kumar, Rohit Sunkam Ramanujam
  • Publication number: 20230224247
    Abstract: Techniques are described for providing a scaled-out transport supported by interconnected data processing units (DPUs) that operates as a single system bus connection proxy for device-to-device communications within a data center. As one example, this disclosure describes techniques for providing a Peripheral Component Interconnect Express (PCIe) proxy for device-to-device communications employing the PCIe standard. The disclosed techniques include adding PCIe proxy logic on top of a host unit of a DPU to expose a PCIe proxy model to application processors, storage devices, network interface controllers, field programmable gate arrays, or other PCIe endpoint devices. The PCIe proxy model may be implemented as a physically distributed Ethernet-based switch fabric with PCIe proxy logic at the edge and fronting the PCIe endpoint devices. The interconnected DPUs and the distributed Ethernet-based switch fabric together provide a reliable, low-latency, and scaled-out transport that operates as a PCIe proxy.
    Type: Application
    Filed: March 23, 2023
    Publication date: July 13, 2023
    Inventors: Wael Noureddine, Felix A. Marti, Aibing Zhou, Dmitriy Leonidovich Budko, Gaurav Gupte, Hoai Vu Thanh Tran, Aravind Vidhyasagar Lappasi, Leith Alan Leedom, Rajesh G. Nair
  • Patent number: 11637773
    Abstract: Techniques are described for providing a scaled-out transport supported by interconnected data processing units (DPUs) that operates as a single system bus connection proxy for device-to-device communications within a data center. As one example, this disclosure describes techniques for providing a Peripheral Component Interconnect Express (PCIe) proxy for device-to-device communications employing the PCIe standard. The disclosed techniques include adding PCIe proxy logic on top of a host unit of a DPU to expose a PCIe proxy model to application processors, storage devices, network interface controllers, field programmable gate arrays, or other PCIe endpoint devices. The PCIe proxy model may be implemented as a physically distributed Ethernet-based switch fabric with PCIe proxy logic at the edge and fronting the PCIe endpoint devices. The interconnected DPUs and the distributed Ethernet-based switch fabric together provide a reliable, low-latency, and scaled-out transport that operates as a PCIe proxy.
    Type: Grant
    Filed: February 9, 2021
    Date of Patent: April 25, 2023
    Assignee: FUNGIBLE, INC.
    Inventors: Wael Noureddine, Felix A. Marti, Aibing Zhou, Dmitriy Leonidovich Budko, Gaurav Gupte, Hoai Vu Thanh Tran, Aravind Vidhyasagar Lappasi, Leith Alan Leedom, Rajesh G. Nair
  • Patent number: 11546189
    Abstract: An access node that can be configured and optimized to perform input and output (I/O) tasks, such as storage and retrieval of data to and from network devices (such as solid state drives), networking, data processing, and the like. For example, the access node may be configured to receive data to be processed, wherein the access node includes a plurality of processing cores, a data network fabric, and a control network fabric; receive, over the control network fabric, a work unit message indicating a processing task to be performed a processing core; and process the work unit message, wherein processing the work unit message includes retrieving data associated with the work unit message over the data network fabric.
    Type: Grant
    Filed: May 18, 2020
    Date of Patent: January 3, 2023
    Assignee: Fungible, Inc.
    Inventors: Pradeep Sindhu, Jean-Marc Frailong, Bertrand Serlet, Wael Noureddine, Felix A. Marti, Deepak Goel, Paul Kim, Rajan Goyal, Aibing Zhou
  • Publication number: 20220174133
    Abstract: This disclosure describes techniques for performing communications between devices using various aspects of Ethernet standards. As further described herein, a protocol is disclosed that may be used for communications between devices, where the communications take place over a physical connection complying with Ethernet standards. Such a protocol may enable reliable and in-order delivery of frames between devices, while following Ethernet physical layer rules, Ethernet symbol encoding, Ethernet lane alignment, and/or Ethernet frame formats.
    Type: Application
    Filed: February 15, 2022
    Publication date: June 2, 2022
    Inventors: Pradeep Sindhu, Deepak Goel, Srihari Raju Vegesna, Aibing Zhou, Shashi Kumar, Rohit Sunkam Ramanujam
  • Patent number: 11272041
    Abstract: This disclosure describes techniques for performing communications between devices using various aspects of Ethernet standards. As further described herein, a protocol is disclosed that may be used for communications between devices, where the communications take place over a physical connection complying with Ethernet standards. Such a protocol may enable reliable and in-order delivery of frames between devices, while following Ethernet physical layer rules, Ethernet symbol encoding, Ethernet lane alignment, and/or Ethernet frame formats.
    Type: Grant
    Filed: October 5, 2020
    Date of Patent: March 8, 2022
    Assignee: Fungible, Inc.
    Inventors: Pradeep Sindhu, Deepak Goel, Srihari Raju Vegesna, Aibing Zhou, Shashi Kumar, Rohit Sunkam Ramanujam
  • Publication number: 20210250285
    Abstract: Techniques are described for providing a scaled-out transport supported by interconnected data processing units (DPUs) that operates as a single system bus connection proxy for device-to-device communications within a data center. As one example, this disclosure describes techniques for providing a Peripheral Component Interconnect Express (PCIe) proxy for device-to-device communications employing the PCIe standard. The disclosed techniques include adding PCIe proxy logic on top of a host unit of a DPU to expose a PCIe proxy model to application processors, storage devices, network interface controllers, field programmable gate arrays, or other PCIe endpoint devices. The PCIe proxy model may be implemented as a physically distributed Ethernet-based switch fabric with PCIe proxy logic at the edge and fronting the PCIe endpoint devices. The interconnected DPUs and the distributed Ethernet-based switch fabric together provide a reliable, low-latency, and scaled-out transport that operates as a PCIe proxy.
    Type: Application
    Filed: February 9, 2021
    Publication date: August 12, 2021
    Inventors: Wael Noureddine, Felix A. Marti, Aibing Zhou, Dmitriy Leonidovich Budko, Gaurav Gupte, Hoai Vu Thanh Tran, Aravind Vidhyasagar Lappasi, Leith Alan Leedom, Rajesh G. Nair
  • Publication number: 20210021696
    Abstract: This disclosure describes techniques for performing communications between devices using various aspects of Ethernet standards. As further described herein, a protocol is disclosed that may be used for communications between devices, where the communications take place over a physical connection complying with Ethernet standards. Such a protocol may enable reliable and in-order delivery of frames between devices, while following Ethernet physical layer rules, Ethernet symbol encoding, Ethernet lane alignment, and/or Ethernet frame formats.
    Type: Application
    Filed: October 5, 2020
    Publication date: January 21, 2021
    Inventors: Pradeep Sindhu, Deepak Goel, Srihari Raju Vegesna, Aibing Zhou, Shashi Kumar, Rohit Sunkam Ramanujam
  • Patent number: 10798223
    Abstract: This disclosure describes techniques for performing communications between devices using various aspects of Ethernet standards. As further described herein, a protocol is disclosed that may be used for communications between devices, where the communications take place over a physical connection complying with Ethernet standards. Such a protocol may enable reliable and in-order delivery of frames between devices, while following Ethernet physical layer rules, Ethernet symbol encoding, Ethernet lane alignment, and/or Ethernet frame formats.
    Type: Grant
    Filed: March 7, 2019
    Date of Patent: October 6, 2020
    Assignee: Fungible, Inc.
    Inventors: Pradeep Sindhu, Deepak Goel, Srihari Raju Vegesna, Aibing Zhou, Shashi Kumar, Rohit Sunkam Ramanujam
  • Publication number: 20200280462
    Abstract: An access node that can be configured and optimized to perform input and output (I/O) tasks, such as storage and retrieval of data to and from network devices (such as solid state drives), networking, data processing, and the like. For example, the access node may be configured to receive data to be processed, wherein the access node includes a plurality of processing cores, a data network fabric, and a control network fabric; receive, over the control network fabric, a work unit message indicating a processing task to be performed a processing core; and process the work unit message, wherein processing the work unit message includes retrieving data associated with the work unit message over the data network fabric.
    Type: Application
    Filed: May 18, 2020
    Publication date: September 3, 2020
    Inventors: Pradeep Sindhu, Jean-Marc Frailong, Bertrand Serlet, Wael Noureddine, Felix A. Marti, Deepak Goel, Paul Kim, Rajan Goyal, Aibing Zhou
  • Patent number: 10659254
    Abstract: A highly-programmable access node is described that can be configured and optimized to perform input and output (I/O) tasks, such as storage and retrieval of data to and from storage devices (such as solid state drives), networking, data processing, and the like. For example, the access node may be configured to execute a large number of data I/O processing tasks relative to a number of instructions that are processed. The access node may be highly programmable such that the access node may expose hardware primitives for selecting and programmatically configuring data processing operations. As one example, the access node may be used to provide high-speed connectivity and I/O operations between and on behalf of computing devices and storage components of a network, such as for providing interconnectivity between those devices and a switch fabric of a data center.
    Type: Grant
    Filed: July 10, 2018
    Date of Patent: May 19, 2020
    Assignee: Fungible, Inc.
    Inventors: Pradeep Sindhu, Jean-Marc Frailong, Bertrand Serlet, Wael Noureddine, Felix A. Marti, Deepak Goel, Paul Kim, Rajan Goyal, Aibing Zhou
  • Publication number: 20190281142
    Abstract: This disclosure describes techniques for performing communications between devices using various aspects of Ethernet standards. As further described herein, a protocol is disclosed that may be used for communications between devices, where the communications take place over a physical connection complying with Ethernet standards. Such a protocol may enable reliable and in-order delivery of frames between devices, while following Ethernet physical layer rules, Ethernet symbol encoding, Ethernet lane alignment, and/or Ethernet frame formats.
    Type: Application
    Filed: March 7, 2019
    Publication date: September 12, 2019
    Inventors: Pradeep Sindhu, Deepak Goel, Srihari Raju Vegesna, Aibing Zhou, Shashi Kumar, Rohit Sunkam Ramanujam
  • Publication number: 20190013965
    Abstract: A highly-programmable access node is described that can be configured and optimized to perform input and output (I/O) tasks, such as storage and retrieval of data to and from storage devices (such as solid state drives), networking, data processing, and the like. For example, the access node may be configured to execute a large number of data I/O processing tasks relative to a number of instructions that are processed. The access node may be highly programmable such that the access node may expose hardware primitives for selecting and programmatically configuring data processing operations. As one example, the access node may be used to provide high-speed connectivity and I/O operations between and on behalf of computing devices and storage components of a network, such as for providing interconnectivity between those devices and a switch fabric of a data center.
    Type: Application
    Filed: July 10, 2018
    Publication date: January 10, 2019
    Inventors: Pradeep Sindhu, Jean-Marc Frailong, Bertrand Serlet, Wael Noureddine, Felix A. Marti, Deepak Goel, Paul Kim, Rajan Goyal, Aibing Zhou
  • Patent number: 8582440
    Abstract: A network device includes a receiver component that generates flow control information. The network device also includes a transmitter component that receives a packet for forwarding to the receiver component, receives flow control data for the packet from the receiver component, and provides the packet and the flow control data for the packet to a fabric component. The fabric component performs a congestion management operation for the packet, and forwards the packet to the receiver component based on the flow control data and results of the congestion management operation.
    Type: Grant
    Filed: February 5, 2010
    Date of Patent: November 12, 2013
    Assignee: Juniper Networks, Inc.
    Inventors: David J. Ofelt, Jean-Marc Frailong, Wing Leong Poon, Aibing Zhou, Xianzhi Li, Hongsheng Ping
  • Patent number: 8462802
    Abstract: A network device receives traffic associated with a network of intermediate network devices and user devices, classifies the received traffic, and allocates the classified traffic to traffic queues. The network device also schedules particular queued traffic, provided in the traffic queues and bound for particular intermediate network devices, using a hybrid weighted round robin (WRR) scheduler where the hybrid WRR scheduler schedules the particular queued traffic according to one of a 1-level WRR schedule, a 1.5 level WRR schedule, or a 2-level WRR schedule. The network device further provides the particular queued traffic to the particular intermediate network devices based on the scheduling of the hybrid WRR scheduler.
    Type: Grant
    Filed: September 13, 2010
    Date of Patent: June 11, 2013
    Assignee: Juniper Networks, Inc.
    Inventors: Aibing Zhou, John Johnson, Chang-Hong Wu, David J. Ofelt
  • Publication number: 20120063313
    Abstract: A network device receives traffic associated with a network of intermediate network devices and user devices, classifies the received traffic, and allocates the classified traffic to traffic queues. The network device also schedules particular queued traffic, provided in the traffic queues and bound for particular intermediate network devices, using a hybrid weighted round robin (WRR) scheduler where the hybrid WRR scheduler schedules the particular queued traffic according to one of a 1-level WRR schedule, a 1.5 level WRR schedule, or a 2-level WRR schedule. The network device further provides the particular queued traffic to the particular intermediate network devices based on the scheduling of the hybrid WRR scheduler.
    Type: Application
    Filed: September 13, 2010
    Publication date: March 15, 2012
    Applicant: JUNIPER NETWORKS, INC.
    Inventors: Aibing ZHOU, John JOHNSON, Chang-Hong WU, David J. OFELT
  • Publication number: 20110194409
    Abstract: A network device includes a receiver component that generates flow control information. The network device also includes a transmitter component that receives a packet for forwarding to the receiver component, receives flow control data for the packet from the receiver component, and provides the packet and the flow control data for the packet to a fabric component. The fabric component performs a congestion management operation for the packet, and forwards the packet to the receiver component based on the flow control data and results of the congestion management operation.
    Type: Application
    Filed: February 5, 2010
    Publication date: August 11, 2011
    Applicant: JUNIPER NETWORKS, INC.
    Inventors: David J. OFELT, Jean-Marc FRAILONG, Wing Leong POON, Aibing ZHOU, Xianzhi LI, Hongsheng PING
  • Patent number: 7735135
    Abstract: A system and method for intrusion detection and prevention processing are described. Spin state information associated with a signature may be prefetched by a network device having one or more buffers. The spin state information may be stored by the buffer. Context data may be searched using the spin state information stored by the buffer.
    Type: Grant
    Filed: August 31, 2005
    Date of Patent: June 8, 2010
    Assignee: Juniper Networks, Inc.
    Inventor: Aibing Zhou
  • Patent number: 7581163
    Abstract: Techniques are described for detecting corruption of buffer pointers passed between a local processor and a remote processor on a network device. For example, the first processor, which may be a memory controller, receives and stores packets within memory. A second processor, such as a host processor for the network device, is coupled to the first processor by a bus. The first processor communicates a memory pointer associated with an a given packet to the second processor for processing of the packet, and maintains a backup copy of the memory pointer. Upon receiving the memory pointer back from the second processor, the first processor compares at least a portion of the memory pointer received from the second processor with an equivalent portion of the copy of the memory pointer to determine whether the received memory pointer has been corrupted.
    Type: Grant
    Filed: June 1, 2006
    Date of Patent: August 25, 2009
    Assignee: Juniper Networks, Inc.
    Inventors: Aibing Zhou, Dongping Luo