Patents by Inventor Aidan Harding

Aidan Harding has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8433744
    Abstract: A multiply-accumulate (MAC) circuit including a queue circuit programmable at runtime is described. In one embodiment, the queue circuit includes a main queue that is programmable at runtime and a supplementary queue. In one embodiment, the queue circuit further includes M multiplexers coupled to the main queue and the supplementary queue, where M is an integer greater than or equal to one. In one embodiment, the MAC circuit further includes M multiplier elements coupled to the queue circuit and an accumulator circuit coupled to the M multiplier elements. The M multiplier elements receive multiplicands from the queue circuits and provide results of multiplications to the accumulator circuit. The accumulator circuit maintains a running sum of the results of the M multiplications performed by the M multiplier elements. In one embodiment, the accumulator circuit includes two adder circuits.
    Type: Grant
    Filed: September 22, 2008
    Date of Patent: April 30, 2013
    Assignee: Altera Corporation
    Inventor: Aidan Harding
  • Patent number: 8045819
    Abstract: A method of filtering image data is described. In one embodiment, the method includes storing in line buffers image data corresponding to a plurality of rows of an image; filtering image data on one row of multiple of rows; and filtering image data on another row of the multiple rows without changing the image data stored in the line buffers between filtering image data on the one row and filtering image data on the another row.
    Type: Grant
    Filed: November 1, 2007
    Date of Patent: October 25, 2011
    Assignee: Altera Corporation
    Inventors: Aidan Harding, Dominic James Nancekievill