Abstract: An apparatus relating generally to signal analysis is disclosed. In such an apparatus, a first comparator is coupled to receive a signal input and a first input level. A second comparator is coupled to receive the signal input and a second input level different from the first input level. A time-to-digital converter is coupled at a first port thereof, such as a start port for example, to receive a first output from the first comparator and coupled at a second port thereof, such as a stop port for example, to receive a second output from the second comparator. The time-to-digital converter is coupled to provide digital words representing the signal input.

Abstract: A high-definition multimedia interface (HDMI) receiver recovers high speed encoded data which are transmitted differentially over data channels of a lossy cable, along with a clock. Inter symbol interference, high-frequency loss, skew between the clock and data channels, and differential skew within a differential signal are compensated by analog circuits which are automatically tuned for best performance by observing the quality of the recovered analog signal. Oversampling is used to provide a 24-bit digital representation of the analog signal for determining the quality of the signal.

Abstract: A high-definition multimedia interface (HDMI) receiver recovers high speed encoded data which are transmitted differentially over data channels of a lossy cable, along with a clock. Inter symbol interference, high-frequency loss, skew between the clock and data channels, and differential skew within a differential signal are compensated by analog circuits which are automatically tuned for best performance by observing the quality of the recovered analog signal. Oversampling is used to provide a 24-bit digital representation of the analog signal for determining the quality of the signal. A corresponding method of deskewing a differential signal and a system and circuit therefor are also provided.

Abstract: Digital to Analog convertors (DAC's) are prone to mismatch noise, particularly in DAC structures using unequally weighted segments. A digital to analog converter, for use in a data conversion system, for converting a digital input to analog output and having features for reducing mismatch noise comprises a plurality of selectable segments, at least two of which have a first weighting factor and at least two of which have a second weighting factor. The segments when selected are connected to a reference signal, with the output for each segment, when selected, being proportional to the weighting factor of the segments. Selection means select segments based on the digital input. Summing means add the output from each selected segment to produce an analog output. The number of segments having the second weighting factor is equal to at least twice the ratio of the first and second weighting factors less one.

Abstract: Mismatch errors within oversampled analog to digital (ADC) and digital to analog (DAC) data converters limit the overall conversion accuracy. A circuit is provided which interchanges the analog segments within a multibit oversampled converter in a fashion to move the mismatch errors away from the overall converter's passband frequencies and towards other frequencies where they do not interfere with the signal to be converted. The circuit works by minimizing the differences in the signals which control the individual segments. Circuits may be provided for achieving first, second and higher order "shaping" of the mismatch errors. The invention also provides a circuit in which exchange of the analog elements with the DACs of multibit oversampled converters is effected using a circular queue, so moving the mismatch errors to high frequency where they do not interfere with the signal to be converted.