Patents by Inventor Aik Koon Loh

Aik Koon Loh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7324982
    Abstract: A method and apparatus for automatically debugging and optimizing an in-circuit test that is used to test a device under test on an automated tester is presented. The novel test debug and optimization technique extracts expert knowledge contained in a knowledge framework and automates the formulation of a valid stable, and preferably optimized, test for execution on an integrated circuit tester.
    Type: Grant
    Filed: May 5, 2004
    Date of Patent: January 29, 2008
    Assignee: Agilent Technologies, Inc.
    Inventors: Aik Koon Loh, Keen Fung Wai, Tiam Hock Tan, Roy H. Williams
  • Patent number: 7321885
    Abstract: A software framework for centralizing the management of test plans, test configurations, test sources, debug information for testing electrical devices in a manufacturing testing environment is presented. A three-tier software architecture is defined that allows one-time effort and segregation of tasks related to integration of hardware devices, development of multiple applications, and testing of multiple applications.
    Type: Grant
    Filed: July 18, 2005
    Date of Patent: January 22, 2008
    Assignee: Agilent Technologies, Inc.
    Inventor: Aik Koon Loh
  • Patent number: 7253606
    Abstract: A method and apparatus for maximizing the usage of a testhead of an in-circuit tester is presented. A testhead execution supervisor interfaces between a testhead controller and a graphical user interface used to enter manual tests. The testhead execution supervisor adds tests to be submitted to the testhead to one or more queues according to a priority scheme. Tests may be submitted to the testhead execution supervisor both as manual tests entered via the graphical user interface and as automatically generated tests generated by an automatic debug module. The automatic debug module may automatically generate tests for execution by the testhead that are executed when the testhead is idle, for example when no higher priority manual tests are scheduled.
    Type: Grant
    Filed: July 18, 2005
    Date of Patent: August 7, 2007
    Assignee: Agilent Technologies, Inc.
    Inventors: Aik Koon Loh, Roy Williams, Keen Fung Jason Wai, Chen Ni Low, Yi Jin, Rex Shang, Tiam Hock Joseph Tan, Daniel Z Whang
  • Patent number: 7089139
    Abstract: A method for configuring an automated in-circuit test debugger is presented. The novel test debug and optimization configuration technique configures expert knowledge into a knowledge framework for use by an automated test debug and optimization system for automating the formulation of a valid stable in-circuit test for execution on an integrated circuit tester. In a system that includes a rule-based controller for controlling interaction between the test-head controller of an integrated circuit tester and an automated debug system, the invention includes a knowledge framework and a rule-based editor. The knowledge framework stores test knowledge in the representation of rules that represent a debugging strategy. The rule-based editor facilitates the use of rules as knowledge to debug or optimize an in-circuit test that is to be executed on the integrated circuit tester.
    Type: Grant
    Filed: August 16, 2004
    Date of Patent: August 8, 2006
    Assignee: Agilent Technologies, Inc.
    Inventors: Aik Koon Loh, Keen Fung Wai, Tiam Hock Tan, Roy H. Williams, Daniel Z. Whang, Chen Ni Low, Ellis Yuan
  • Patent number: 6242756
    Abstract: A method and an apparatus for the measurement and inspection of integrated circuit. Such an apparatus includes a camera for sensing an image of the integrated circuit (IC), an oblique light source, and a reflector. The camera has an optical axis passing through the IC normal to the plane of the IC. The oblique light source radiates light on the IC obliquely to the plane of the IC such that at least a portion of the oblique light source is positioned on one side of the optical axis. The reflector is positioned on the opposite side of the optical axis relative the portion of the oblique light source for reflecting light that crosses the optical axis from the oblique light source to the camera, such that at least a portion of the IC interposes between the portion of the oblique light source and the reflector. As a result, the shape of that portion of the IC is imaged on the camera by backlighting. The leads on the IC can be inspected in this manner.
    Type: Grant
    Filed: December 4, 1998
    Date of Patent: June 5, 2001
    Assignee: Agilent Technologies, Inc
    Inventors: Peng Seng Toh, Chiat Pin Tay, Aik Koon Loh, Ying Jian Wang