Patents by Inventor Aimad Saib

Aimad Saib has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250141717
    Abstract: A circuit is disclosed. The circuit includes a transmitter having an input terminal arranged to receive input data and a transmission node arranged to transmit intermediate data corresponding to the input data, and a receiver having a receive node arranged to receive the intermediate data and an output terminal arranged to produce output data corresponding to the input data, the receiver further including a dV/dt detector circuit coupled to the receive node and arranged to stop the production of the output data at the output terminal when the dV/dt detector circuit detects a rate of change of voltage with respect to time greater than a predetermined threshold.
    Type: Application
    Filed: January 6, 2025
    Publication date: May 1, 2025
    Applicant: NAVITAS SEMICONDUCTOR LIMITED
    Inventors: Vincent Dessard, Aimad SAIB
  • Patent number: 12212440
    Abstract: A circuit is disclosed. The circuit includes a transmitter having an input terminal arranged to receive input data and a transmission node arranged to transmit intermediate data corresponding to the input data, and a receiver having a receive node arranged to receive the intermediate data and an output terminal arranged to produce output data corresponding to the input data, the receiver further including a dV/dt detector circuit coupled to the receive node and arranged to stop the production of the output data at the output terminal when the dV/dt detector circuit detects a rate of change of voltage with respect to time greater than a predetermined threshold.
    Type: Grant
    Filed: January 9, 2024
    Date of Patent: January 28, 2025
    Assignee: Navitas Semiconductor Limited
    Inventors: Vincent Dessard, Aimad Saib
  • Publication number: 20240421820
    Abstract: The invention relates to a digital isolator comprising a logic module (20) for receiving an input signal D, and providing command signals (41, 42) to sawtooth modulators. A first sawtooth modulator provides a first sawtooth signal at a node A1 comprising a fast rising edge triggered by a rising edge of a control signal, followed by a slow falling edge, when D equals 1 and comprises a fast falling edge triggered by a rising edge of a control signal, followed by a slow rising edge, when D equals 0. A second sawtooth modulator provides a second sawtooth signal at node A2, inverted with respect to first sawtooth signal. Isolation capacitors (61, 62) are connected to nodes A1 and A2 and are used as isolation barrier and as part of a high-pass filter together with dipoles Z1 and Z2. Threshold comparators (121, 122) provide the output signals S and R.
    Type: Application
    Filed: August 28, 2024
    Publication date: December 19, 2024
    Applicant: Navitas Semiconductor Limited
    Inventors: Vincent DESSARD, Aimad SAIB
  • Patent number: 12095456
    Abstract: A digital isolator. The digital isolator a logic module for receiving an input signal D, and providing command signals to first and second sawtooth modulators. The first sawtooth modulator can provide a first sawtooth signal at a node A1 having a fast rising edge triggered by a rising edge of a control signal, followed by a slow falling edge, when D equals 1 and having a fast falling edge triggered by a rising edge of a control signal, followed by a slow rising edge, when D equals 0. A second sawtooth modulator provides a second sawtooth signal at node A2, inverted with respect to first sawtooth signal. Isolation capacitors connected to nodes A1 and A2 can be used as isolation barrier and as part of high-pass filters together with dipoles Z1 and Z2.
    Type: Grant
    Filed: December 24, 2020
    Date of Patent: September 17, 2024
    Assignee: Navitas Semiconductor Limited
    Inventors: Vincent Dessard, Aimad Saib
  • Publication number: 20240235384
    Abstract: A circuit is disclosed. The circuit includes a transmitter having an input terminal arranged to receive input data and a transmission node arranged to transmit intermediate data corresponding to the input data, and a receiver having a receive node arranged to receive the intermediate data and an output terminal arranged to produce output data corresponding to the input data, the receiver further including a dV/dt detector circuit coupled to the receive node and arranged to stop the production of the output data at the output terminal when the dV/dt detector circuit detects a rate of change of voltage with respect to time greater than a predetermined threshold.
    Type: Application
    Filed: January 9, 2024
    Publication date: July 11, 2024
    Applicant: Navitas Semiconductor Limited
    Inventors: Vincent DESSARD, Aimad SAIB
  • Publication number: 20230058123
    Abstract: The invention relates to a digital isolator comprising a logic module (20) for receiving an input signal D, and providing command signals (41, 42) to sawtooth modulators. A first sawtooth modulator provides a first sawtooth signal at a node A1 comprising a fast rising edge triggered by a rising edge of a control signal, followed by a slow falling edge, when D equals 1 and comprises a fast falling edge triggered by a rising edge of a control signal, followed by a slow rising edge, when D equals 0. A second sawtooth modulator provides a second sawtooth signal at node A2, inverted with respect to first sawtooth signal. Isolation capacitors (61, 62) are connected to nodes A1 and A2 and are used as isolation barrier and as part of a high-pass filter together with dipoles Z1 and Z2. Threshold comparators (121, 122) provide the output signals S and R.
    Type: Application
    Filed: December 24, 2020
    Publication date: February 23, 2023
    Applicant: VDDTECH
    Inventors: Vincent DESSARD, Aimad SAIB
  • Publication number: 20100080978
    Abstract: The present invention provides a polymer composite material structure comprising at least one layer of a foamed polymer composite material comprising a foamed polymer matrix and 0.1 wt % to 6 wt % carbon based conductive loads, such as e.g. carbon nanotubes, dispersed in the foamed polymer matrix. The polymer composite material structure according to embodiments of the present invention shows good shielding and absorbing properties notwithstanding the low amount of carbon based conductive loads. The present invention furthermore provides a method for forming a polymer composite material structure comprising carbon based conductive loads.
    Type: Application
    Filed: December 4, 2007
    Publication date: April 1, 2010
    Inventors: Robert Jerome, Christophe Pagnoulle, Christophe Detrembleur, Jean-Michel Thomassin, Isabelle Huynen, Christian Bailly, Lukasz Bednarz, Raphael Daussin, Aimad Saib, Anne-Christine Baudouin, Xavier Laloyaux