Patents by Inventor Aishwarya Balakrishnan

Aishwarya Balakrishnan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Capacitor compensated dual of polyphase filter
    Patent number: 10734967
    Abstract: A polyphase filter operates to provide capacitive compensation to drive a multiphase network for generating quadrature signals. The polyphase filter can include a capacitive compensation mechanism at internal nodes. The capacitive compensation mechanism includes a first phase lag circuit between a first internal node and a second internal node and a second phase lag circuit coupled between a third internal node and a fourth internal node. The first internal node is coupled to the second internal node via a first inductor coupled to a first resistor, the second internal node is coupled to the third internal node via a second inductor coupled to a second resistor, the third internal node is coupled to the fourth internal node via a third inductor coupled to a third resistor, and the fourth internal node is coupled to the first internal node via a fourth inductor coupled to a fourth resistor.
    Type: Grant
    Filed: September 28, 2018
    Date of Patent: August 4, 2020
    Assignee: Apple Inc.
    Inventors: Brandon Davis, Aishwarya Balakrishnan
  • CAPACITOR COMPENSATED DUAL OF POLYPHASE FILTER
    Publication number: 20200106413
    Abstract: A polyphase filter operates to provide capacitive compensation to drive a multiphase network for generating quadrature signals. The polyphase filter can include a capacitive compensation mechanism at internal nodes. The capacitive compensation mechanism includes a first phase lag circuit between a first internal node and a second internal node and a second phase lag circuit coupled between a third internal node and a fourth internal node. The first internal node is coupled to the second internal node via a first inductor coupled to a first resistor, the second internal node is coupled to the third internal node via a second inductor coupled to a second resistor, the third internal node is coupled to the fourth internal node via a third inductor coupled to a third resistor, and the fourth internal node is coupled to the first internal node via a fourth inductor coupled to a fourth resistor.
    Type: Application
    Filed: September 28, 2018
    Publication date: April 2, 2020
    Inventors: Brandon Davis, Aishwarya Balakrishnan