Patents by Inventor Aishwarya Ganesan

Aishwarya Ganesan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240256510
    Abstract: A distributed file system operating over a plurality of hosts is built on top of a tree structure having a root node, internal nodes, and leaf nodes. Each host maintains at least one node and non-leaf nodes are allocated buffers according to a workload of the distributed file system. A write operation is performed by inserting write data into one of the nodes of the tree structure having a buffer. A read operation is performed by traversing the tree structure down to a leaf node that stores read target data, collecting updates to the read target data, which are stored in buffers of the traversed nodes, applying the updates to the read target data, and returning the updated read target data as read data.
    Type: Application
    Filed: January 27, 2023
    Publication date: August 1, 2024
    Inventors: Naama BEN DAVID, Aishwarya GANESAN, Jonathan HOWELL, Robert T. JOHNSON, Adriana SZEKERES
  • Patent number: 11893273
    Abstract: A method of writing to a tiered memory system of a computing device, the tiered memory system including volatile memory and persistent memory (PMEM), includes the steps of: in response to a first write request including first data to write to a first page of the tiered memory system, copying contents of the first page to a second page located in the PMEM; after copying the contents of the first page to the second page, writing the first data to the second page; and after writing the first data to the second page, updating a first mapping of the tiered memory system to reference the second page instead of the first page.
    Type: Grant
    Filed: January 20, 2022
    Date of Patent: February 6, 2024
    Assignee: VMware, Inc.
    Inventors: Robert T. Johnson, Alexander John Horton Conway, Yi Xu, Aishwarya Ganesan, Ramnatthan Alagappan
  • Publication number: 20230229346
    Abstract: A method of writing to a tiered memory system of a computing device, the tiered memory system including volatile memory and persistent memory (PMEM), includes the steps of: in response to a first write request including first data to write to a first page of the tiered memory system, copying contents of the first page to a second page located in the PMEM; after copying the contents of the first page to the second page, writing the first data to the second page; and after writing the first data to the second page, updating a first mapping of the tiered memory system to reference the second page instead of the first page.
    Type: Application
    Filed: January 20, 2022
    Publication date: July 20, 2023
    Inventors: Robert T. JOHNSON, Alexander John Horton CONWAY, Yi XU, Aishwarya GANESAN, Ramnatthan ALAGAPPAN
  • Patent number: 11231852
    Abstract: In the embodiment a determination is made, for one or more applications being executed by the computing system, of an amount of the first or second memory being used by the one or more applications. Based on the determination, a portion of the memory resources of the third memory are configured to function with the first or second memory when it is determined that the amount of the first or second memory being used by the one or more applications is not sufficient for the memory needs of the one or more applications and a portion of the memory resources of the third memory are removed from functioning with the first or second memory when it is determined that the amount of the first or second memory being used by the one or more applications is more than is needed for the memory needs of the one or more applications.
    Type: Grant
    Filed: December 18, 2017
    Date of Patent: January 25, 2022
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventors: Anirudh Badam, Sriram Govindan, Bikash Sharma, Badriddine Khessib, Iyswarya Narayanan, Aishwarya Ganesan
  • Publication number: 20190187897
    Abstract: In the embodiment a determination is made, for one or more applications being executed by the computing system, of an amount of the first or second memory being used by the one or more applications. Based on the determination, a portion of the memory resources of the third memory are configured to function with the first or second memory when it is determined that the amount of the first or second memory being used by the one or more applications is not sufficient for the memory needs of the one or more applications and a portion of the memory resources of the third memory are removed from functioning with the first or second memory when it is determined that the amount of the first or second memory being used by the one or more applications is more than is needed for the memory needs of the one or more applications.
    Type: Application
    Filed: December 18, 2017
    Publication date: June 20, 2019
    Inventors: Anirudh Badam, Sriram Govindan, Bikash Sharma, Badriddine Khessib, Iyswarya Narayanan, Aishwarya Ganesan