Abstract: The present disclosure provides a display substrate and a display device. The display substrate includes a plurality of pixel regions, and each pixel region corresponds to a pixel. Each pixel region includes sub-regions in at least two rows, the sub-regions in each row include at least two sub-regions, a part of the sub-regions in each pixel region correspond to the sub-pixels of the pixel, and at least one sub-region is an opaque region.

Abstract: Provided is a touch display substrate. The touch display substrate includes a base substrate, including a display region and a non-display region; a plurality of touch electrodes disposed in the display region; and a plurality of signal transmission circuits, a plurality of first control lines, a plurality of second control lines, a target signal line, and a plurality of touch signal lines that are disposed in the non-display region.

Abstract: The present disclosure provides a display substrate and a display apparatus. The display substrate includes a base substrate, including a display region and a frame region located on at least one side of the display region; a transistor, located on the base substrate, wherein the transistor is located in the display region and includes a gate, a first electrode and an active layer; and a protective structure, located on the base substrate, wherein the protective structure is provided in the frame region and close to the display region, and the protective structure is in the same layer as and is made of the same material as at least one of the active layer, the gate or the first electrode.

Abstract: Disclosed are a display substrate, a display substrate motherboard and a display apparatus. The display substrate includes a display region and a bonding region located on a side of the display region, wherein the bonding region includes a fanout region, the fanout region includes a first anti-static area and a first wiring area located around the first anti-static area, the first wiring area includes a plurality of fanout wires, the first anti-static area includes at least one electrostatic protection structure disposed between the plurality of fanout wires, and the electrostatic protection structure includes at least one pair of electrostatic protection lines, and the pair of electrostatic protection lines includes two electrostatic protection lines disposed symmetrically about a center line extending in a first direction.

Abstract: The present disclosure provides a display substrate and a display device. The display substrate includes a plurality of pixel regions, and each pixel region corresponds to a pixel. Each pixel region includes sub-regions in at least two rows, the sub-regions in each row include at least two sub-regions, a part of the sub-regions in each pixel region correspond to the sub-pixels of the pixel, and at least one sub-region is an opaque region.

Abstract: An array substrate includes a display area and a peripheral area on a side of the display area, and includes a base substrate, at least one low temperature polycrystalline silicon thin film transistor on the base substrate and in the peripheral area, and at least one oxide thin film transistor on the base substrate and in the display area; the low temperature polycrystalline silicon thin film transistor includes a low temperature polycrystalline silicon semiconductor layer, a first gate, and a first source and a first drain, which are sequentially arranged along a direction away from the base substrate; the oxide thin film transistor includes an oxide semiconductor layer, a second gate, and a second source and a second drain, which are sequentially arranged along the direction away from the base substrate; and the first source and the first drain are each in a different layer from the second gate.

Abstract: The present disclosure provides an array substrate and a display panel. The array substrate includes a base substrate and at least one signal line unit in a fan-out region of the base substrate. Each of the at least one signal line unit includes two first signal lines and one second signal line, and the two first signal lines and the one second signal line are respectively in different layers and extend in a same direction. A center line of an orthographic projection of the one second signal line on the base substrate overlaps with a center line of an orthographic projection of an interval region between the two first signal lines.

Abstract: Provided is a touch display substrate. The touch display substrate includes a base substrate, including a display region and a non-display region; a plurality of touch electrodes disposed in the display region; and a plurality of signal transmission circuits, a plurality of first control lines, a plurality of second control lines, a target signal line, and a plurality of touch signal lines that are disposed in the non-display region.

Abstract: A substrate in an array substrate includes a light aperture region and a winding region arranged around the light aperture region. On the substrate, an orthographic projection of a first winding in each first signal line is overlapped with an orthographic projection of a second winding in a corresponding second signal line. In this way, the distance between two adjacent signal lines in the winding region is larger, and the parasitic capacitance generated between them is smaller.

Abstract: The present disclosure provides an array substrate and a display panel. The array substrate includes a base substrate and at least one signal line unit in a fan-out region of the base substrate. Each of the at least one signal line unit includes two first signal lines and one second signal line, and the two first signal lines and the one second signal line are respectively in different layers and extend in a same direction. A center line of an orthographic projection of the one second signal line on the base substrate overlaps with a center line of an orthographic projection of an interval region between the two first signal lines.

Abstract: A substrate in an array substrate includes a light aperture region and a winding region arranged around the light aperture region. On the substrate, an orthographic projection of a first winding in each first signal line is overlapped with an orthographic projection of a second winding in a corresponding second signal line. In this way, the distance between two adjacent signal lines in the winding region is larger, and the parasitic capacitance generated between them is smaller.