Abstract: A digital-to-analog converter (DAC) includes a first DAC core, a second DAC core, and a butterfly switch. The first DAC core generates a first output. The second DAC core generates a second output. The butterfly switch includes at least one of switch transistors and cascode transistors. The butterfly switch selectively connects the first output and the second output to an output stage of the DAC.

Abstract: A digital-to-analog converter (DAC) includes a first DAC core, a second DAC core, and a butterfly switch. The first DAC core generates a first output. The second DAC core generates a second output. The butterfly switch includes at least one of switch transistors and cascode transistors. The butterfly switch selectively connects the first output and the second output to an output stage of the DAC.

Abstract: Wide band CMOS digital to analog converters (DACs), including converters with selectable impulse response, using multiple DAC cores. The DAC cores operate on the same data at the DAC clock rate, but staggered in phase. Switches are used to switch the later part of the output time of each DAC core to the DAC output, otherwise to a dummy load. Thus each DAC conversion is comprised of a later part of each DAC core conversion, at least the first part of each DAC core conversion being ignored to allow each DAC core to settle before utilizing its output. Since the same switches and switching sequence is used on each DAC data conversion, the effects of switch imbalances are negated. Various embodiments are disclosed, including manipulation of the input to one of the DAC cores to selectively provide an NRZ, RZ and an RF response.

Abstract: A track-and-hold amplifier circuit capable of increasing hold mode isolation includes an input circuit to buffer an input signal coupled to a switching transistor. A clamping transistor couples to the base of the switching transistor, and a hold capacitor couples between the emitter of the switching transistor and circuit ground. A differential amplifier circuit has a first input for receiving a track signal and a second input for receiving a hold signal. When the differential amplifier circuit receives the track signal, the switching circuit closes to charge the hold capacitor. When the differential amplifier receives the hold signal, the switching transistor opens to store the voltage representative of the input signal on the hold capacitor and the clamping transistor clamps the voltage at the base of the switching transistor. Thus, the base emitter voltage of the switching transistor is zero volts, and the signal held by the hold capacitor is independent of the input signal.

Abstract: A current mirror having a high output voltage swing and which uses only one reference current source. The current source provides an output current that is substantially equal to the reference current and, as such, does not suffer from a current offset. The current mirror achieves body-effect cancellation, permits easy scaling of current consumption and provides for fast charging and discharging of the bias lines.