Patents by Inventor Ajay Kumar Yadav

Ajay Kumar Yadav has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240301552
    Abstract: Described herein is a method for performing an atomic layer deposition process to form a silicon doped oxide film on a surface of the substrate. The oxide film may be a hafnium-zirconium oxide film, or a zirconium oxide film. The atomic layer deposition process may include forming the oxide layers and a silicon layer using a hydrogen peroxide as at least one of the precursors used in formation of the oxide layers.
    Type: Application
    Filed: March 9, 2023
    Publication date: September 12, 2024
    Inventors: Harshil Kashyap, Andrew C. Kummel, Ajay Kumar Yadav, Keith T. Wong, Srinivas Nemani, Ellie Yieh
  • Publication number: 20240284933
    Abstract: Whole-cut imitators are disclosed mimicking animal muscles that have a basic structure that is common to most if not all animal species that are consumed for meat. The animal muscle mimics are made from plant proteins and other components that comprise whole-cuts that are in turn comprised of muscle fascicles, which in turn are made of plant-based muscle fibers. The muscles, fascicles and plant-based muscle fibers are bound together by extra-cellular matrix, (ECM), of which there are three kinds, a first ECM that binds plant-based muscle fibers together that is called the endomysium, a second ECM that coats and binds fascicles that is called the perimysium, and a third ECM that coats and binds muscles together that is called the epimysium.
    Type: Application
    Filed: February 22, 2024
    Publication date: August 29, 2024
    Applicant: Demolish Foods Inc.
    Inventors: Sandeep Sibal, Ravali Amba, Amrita Behera, Prativa Das, Dhanesh Alagarsamy, Ajay Kumar Yadav, Raghavi Rao Kodati, Shirin Fatima, Emma Dolan, Subramoni Hariharan
  • Patent number: 9065696
    Abstract: An equalizer that includes equalizer circuitry, a mean squared error (MSE) system, and adaptive control logic includes features that inhibit undesirable convergence to local minima.
    Type: Grant
    Filed: August 17, 2013
    Date of Patent: June 23, 2015
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Georgios Asmanis, Faouzi Chaahoub, Samir Aboulhouda, Sriramkumar Sundararaman, Ajay Kumar Yadav
  • Publication number: 20150049797
    Abstract: An equalizer that includes equalizer circuitry, a mean squared error (MSE) system, and adaptive control logic includes features that inhibit undesirable convergence to local minima.
    Type: Application
    Filed: August 17, 2013
    Publication date: February 19, 2015
    Applicant: Avago Technologies General IP (Singapore) Pte. Ltd
    Inventors: Georgios Asmanis, Faouzi Chaahoub, Samir Aboulhouda, Sriramkumar Sundararaman, Ajay Kumar Yadav
  • Patent number: 8744029
    Abstract: A data stream monitor includes an analog front end (AFE) and a digital state machine. The AFE receives recovered clock and data signals at a first rate. The AFE uses the recovered clock and a phase interpolator to generate a phase-adjusted clock signal at a second rate slower than the first rate. The AFE uses a detector operating with the phase-adjusted clock signal to generate a representation of the data signal generated from comparisons of the data signal with two reference voltages. A logical combination of the results from the comparisons generates a signal that identifies when the data signal voltage is near the common-mode voltage. The digital state machine generates a strobe signal at a third rate slower than the second rate. The strobe signal is used by the AFE to sample the signal. The sample is forwarded to the digital state machine where it is stored.
    Type: Grant
    Filed: September 25, 2012
    Date of Patent: June 3, 2014
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Georgios Asmanis, Faouzi Chaahoub, Ajay Kumar Yadav, Sriramkumar Sundararaman
  • Publication number: 20140086291
    Abstract: A data stream monitor includes an analog front end (AFE) and a digital state machine. The AFE receives recovered clock and data signals at a first rate. The AFE uses the recovered clock and a phase interpolator to generate a phase-adjusted clock signal at a second rate slower than the first rate. The AFE uses a detector operating with the phase-adjusted clock signal to generate a representation of the data signal generated from comparisons of the data signal with two reference voltages. A logical combination of the results from the comparisons generates a signal that identifies when the data signal voltage is near the common-mode voltage. The digital state machine generates a strobe signal at a third rate slower than the second rate. The strobe signal is used by the AFE to sample the signal. The sample is forwarded to the digital state machine where it is stored.
    Type: Application
    Filed: September 25, 2012
    Publication date: March 27, 2014
    Applicant: Acago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Georgios Asmanis, Faouzi Chaahoub, Ajay Kumar Yadav, Sriramkumar Sundararaman