Abstract: A secondary graphics processor control system includes a secondary graphics processor. A controller is coupled to the secondary graphics processor. The controller detects the start of an application that is associated with a secondary graphics processor and then determines a power capability of a battery. The controller then either prevents enablement of the secondary graphics processor if the power capability is below a predetermined threshold such that only a primary graphics processor processes graphics for the application, or allows enablement of the secondary graphics processor if the power capability is above the predetermined threshold such that the secondary graphics processor processing graphics for the application. The primary graphics processor may be an integrated graphics processing unit (iGPU) provided by a system processor that is mounted to a board, and the secondary graphics processor may be a discrete graphics processing unit (dGPU) that is coupled to the board.

Abstract: A secondary graphics processor control system includes a secondary graphics processor. A controller is coupled to the secondary graphics processor. The controller detects the start of an application that is associated with a secondary graphics processor and then determines a power capability of a battery. The controller then either prevents enablement of the secondary graphics processor if the power capability is below a predetermined threshold such that only a primary graphics processor processes graphics for the application, or allows enablement of the secondary graphics processor if the power capability is above the predetermined threshold such that the secondary graphics processor processing graphics for the application. The primary graphics processor may be an integrated graphics processing unit (iGPU) provided by a system processor that is mounted to a board, and the secondary graphics processor may be a discrete graphics processing unit (dGPU) that is coupled to the board.

Abstract: An information handling system (“IHS”) including a processor, a memory controller coupled to the processor, and a memory device interface coupled to the memory controller is provided. The IHS also includes a voltage control circuit, coupled to the interface, for determining whether the interface is coupled to a memory expansion board or a memory device. In response to determining that the interface is coupled to a memory device, the circuit activates a first voltage regulator for supplying a first level of voltage. In response to determining that the interface is coupled to a memory expansion board, the circuit activates a second voltage regulator for supplying a second level of voltage.

Abstract: An information handling system (“IHS”) including a processor, a memory controller coupled to the processor, and a memory device interface coupled to the memory controller is provided. The IHS also includes a voltage control circuit, coupled to the interface, for determining whether the interface is coupled to a memory expansion board or a memory device. In response to determining that the interface is coupled to a memory device, the circuit activates a first voltage regulator for supplying a first level of voltage. In response to determining that the interface is coupled to a memory expansion board, the circuit activates a second voltage regulator for supplying a second level of voltage.

Abstract: An information handling system (“IHS”) including a processor, a memory controller coupled to the processor, and a memory device interface coupled to the memory controller is provided. The IHS also includes a voltage control circuit, coupled to the interface, for determining whether the interface is coupled to a memory expansion board or a memory device. In response to determining that the interface is coupled to a memory device, the circuit activates a first voltage regulator for supplying a first level of voltage. In response to determining that the interface is coupled to a memory expansion board, the circuit activates a second voltage regulator for supplying a second level of voltage.

Abstract: An apparatus for mounting a card in an information handling system provides a first riser card including a plurality of first connections. A second riser card is coupled to the first riser card by a plurality of connectors, the second riser card including a plurality of second connections. A first card slot extends from the first riser card and is electrically coupled to the plurality of first connections, and a second card slot extends from the first riser card and is electrically coupled to the plurality of second connections. The apparatus may be coupled to an information handling system in a chassis to provide for the mounting of cards in the chassis.

Abstract: A card coupling apparatus includes a circuit board, a plurality of card connectors mounted on the circuit board, a system connector mounted to the circuit board, and a switch chip mounted to the circuit board and electrically coupled to the plurality of card connectors and the system connector. The card coupling apparatus may be coupled to an information handling system and a plurality of video cards may be coupled to the information handling system by coupling the plurality of video cards to the card coupling apparatus.

Abstract: In a computer system or information handling system, a virtual system event provides for the communication of the notification of a system events from the hardware of the computer system to the power and configuration management system of the computer system.

Abstract: In a method and system for transferring power from a first subsystem to a second subsystem of a computer via a Newcard device, a first port of the device having a first connector is used to electrically connect the first subsystem to the device. The first connector includes at least one pin terminal to transfer the power and at least one pin terminal coupled to an SMbus of the computer. A second port of the device having a second connector is used to electrically couple the device to the second subsystem. The second connector includes at least one pin terminal to transfer the power. An identifier stored in the device is read by the first subsystem to uniquely identify the device. In response to the identifier, the first subsystem controls an amount of the power transferred to the device.

Abstract: A card coupling apparatus includes a circuit board, a plurality of card connectors mounted on the circuit board, a system connector mounted to the circuit board, and a switch chip mounted to the circuit board and electrically coupled to the plurality of card connectors and the system connector. The card coupling apparatus may be coupled to an information handling system and a plurality of video cards may be coupled to the information handling system by coupling the plurality of video cards to the card coupling apparatus.

Abstract: An information handling system cooling fan operating curve is automatically selected for use by a cooling fan controller by detecting the configuration of the information handling system and looking up cooling fan operating parameters from a table associated with the information handling system. For instance, central processing unit identification information is used to select associated cooling fan operating parameters so that adequate cooling is available to meet system cooling constraints for the heat characteristics of the central processing unit with reduced acoustic impact associated with operation of the information handling system.

Abstract: An information handling system (“IHS”) including a processor, a memory controller coupled to the processor, and a memory device interface coupled to the memory controller is provided. The IHS also includes a voltage control circuit, coupled to the interface, for determining whether the interface is coupled to a memory expansion board or a memory device. In response to determining that the interface is coupled to a memory device, the circuit activates a first voltage regulator for supplying a first level of voltage. In response to determining that the interface is coupled to a memory expansion board, the circuit activates a second voltage regulator for supplying a second level of voltage.

Abstract: An energy discharge resistance is isolated from storage capacitance containing a voltage charge until power is removed from the storage capacitance. Then the discharge resistance may be coupled to the storage capacitance to drain residual charge therefrom. The discharge resistance is coupled to the storage capacitance when external power is removed and is un-coupled from the storage capacitance when external power is applied to the storage capacitance. In this way, unnecessary power draw during operation or standby of an electronic system is substantially eliminated.

Abstract: An external power adapter prevents damage to contacts of power connectors by reducing current in-rush when the powered-up external power adapter is coupled to an information handling system. A control signal from the information handling system is used to initiate a voltage output of the external power adapter such that substantially no voltage is present on the contacts of the power connectors until the control signal is detected by the external power adapter. The external power adapter may determine the presence of an electrical load before applying the output voltage to the information handling system. The output voltage may be ramped from substantially no voltage to operating voltage over a period of time.

Abstract: An apparatus for mounting a card in an information handling system provides a first riser card including a plurality of first connections. A second riser card is coupled to the first riser card by a plurality of connectors, the second riser card including a plurality of second connections. A first card slot extends from the first riser card and is electrically coupled to the plurality of first connections, and a second card slot extends from the first riser card and is electrically coupled to the plurality of second connections. The apparatus may be coupled to an information handling system in a chassis to provide for the mounting of cards in the chassis.

Abstract: A video display controller for controlling multiple display devices is disclosed. The video display controller includes a graphics processing unit that is adapted to receive input and transmit output to one or more display devices. The video display controller also includes a single display device connector in communication with the graphics processing unit. The video display controller is adapted to independently control a first display device and a second display device through the display device connector.

Abstract: An information handling system cooling fan operating curve is automatically selected for use by a cooling fan controller by detecting the configuration of the information handling system and looking up cooling fan operating parameters from a table associated with the information handling system. For instance, central processing unit identification information is used to select associated cooling fan operating parameters so that adequate cooling is available to meet system cooling constraints for the heat characteristics of the central processing unit with reduced acoustic impact associated with operation of the information handling system.

Abstract: In a computer system or information handling system, a virtual system event provides for the communication of the notification of a system events from the hardware of the computer system to the power and configuration management system of the computer system.

Abstract: In a method and system for transferring power from a first subsystem to a second subsystem of a computer via a Newcard device, a first port of the device having a first connector is used to electrically connect the first subsystem to the device. The first connector includes at least one pin terminal to transfer the power and at least one pin terminal coupled to an SMbus of the computer. A second port of the device having a second connector is used to electrically couple the device to the second subsystem. The second connector includes at least one pin terminal to transfer the power. An identifier stored in the device is read by the first subsystem to uniquely identify the device. In response to the identifier, the first subsystem controls an amount of the power transferred to the device.

Abstract: In a method and system for partitioning a computer into a first and second subsystem, a Newcard device is defined to electrically couple the first subsystem to the second subsystem. The first subsystem is defined to include certain selectable components of the computer having at least one common property, while the second subsystem is defined to include remaining components of the computer. The Newcard device includes a first port electrically coupled to the first subsystem by a first connector, a second port electrically coupled to the second subsystem by a second connector, and a communication component electrically coupled to the first and second ports. The second port includes at least one high speed serial communications bus. The communication component is operable to control signals transferred between the first and second connector.