Patents by Inventor Ajit Kumar Trivedi

Ajit Kumar Trivedi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6453537
    Abstract: A method for cooling electrical components on a substrate during a rework process. A block of a porous, thermally conductive material, saturated with a liquid, is positioned on an electrical component to be cooled. During the rework processing of an adjacent electrical component, the liquid in the porous, thermally conductive block vaporizes, thereby maintaining the temperature of the electrical component below its reflow temperature. A second thermally conductive block, in thermal contact with the porous, thermally conductive block, and the substrate on which the electronic component to be cooled is attached, is positioned between the electronic component to be cooled and the electronic component undergoing rework. A supply of liquid is provided to the porous, thermally conductive block to maintain the temperature of the electronic component to be cooled at a predetermined level for a specified period of time.
    Type: Grant
    Filed: November 10, 1999
    Date of Patent: September 24, 2002
    Assignee: International Business Machines Corporation
    Inventors: Craig G. Heim, Wade Leslie Hooker, Ajit Kumar Trivedi
  • Patent number: 6437254
    Abstract: A method and apparatus for efficiently repairing or reworking a printed circuit board having a solder ball grid array thereon efficiently and at minimum cost includes the steps of drilling out a plated-through hole to sever electrical connections between a ball grid array pad on one surface of the printed circuit board and internal circuits and circuits on an opposite surface of the printed circuit board; inserting a pin having an insulated sleeve surrounding a portion thereof into the drilled-out hole, the pin having attached to one end a wire for attachment to the ball grid array on one surface of the printed circuit board and a post at the other end of the pin for attachment of a wire to the post; the pin having a stop along its length to control vertical positioning of the pin in the drilled-out hole, the pin referred to as a via replacement (VR) pin.
    Type: Grant
    Filed: August 24, 2001
    Date of Patent: August 20, 2002
    Assignee: International Business Machines Corporation
    Inventors: Alan Harris Crudo, John Gillette Davis, Christian Robert Le Coz, Mark Vincent Pierson, Amit Kumar Sarkhel, Ajit Kumar Trivedi
  • Publication number: 20020059721
    Abstract: A method and apparatus for efficiently repairing or reworking a printed circuit board having a solder ball grid array thereon efficiently and at minimum cost includes the steps of drilling out a plated-through hole to sever electrical connections between a ball grid array pad on one surface of the printed circuit board and internal circuits and circuits on an opposite surface of the printed circuit board; inserting a pin having an insulated sleeve surrounding a portion thereof into the drilled-out hole, the pin having attached to one end a wire for attachment to the ball grid array on one surface of the printed circuit board and a post at the other end of the pin for attachment of a wire to the post; the pin having a stop along its length to control vertical positioning of the pin in the drilled-out hole, the pin referred to as a via replacement (VR) pin.
    Type: Application
    Filed: August 24, 2001
    Publication date: May 23, 2002
    Applicant: International Business Machines Corporation
    Inventors: Alan Harris Crudo, John Gillette Davis, Christian Robert Le Coz, Mark Vincent Pierson, Amit Kumar Sarkhel, Ajit Kumar Trivedi
  • Patent number: 6295724
    Abstract: A method and apparatus for efficiently repairing or reworking a printed circuit board having a solder ball grid array thereon efficiently and at minimum cost includes the steps of drilling out a plated-through hole to sever electrical connections between a ball grid array pad on one surface of the printed circuit board and internal circuits and circuits on an opposite surface of the printed circuit board; inserting a pin having an insulated sleeve surrounding a portion thereof into the drilled-out hole, the pin having attached to one end a wire for attachment to the ball grid array on one surface of the printed circuit board and a post at the other end of the pin for attachment of a wire to the post; the pin having a stop along its length to control vertical positioning of the pin in the drilled-out hole, the pin referred to as a via replacement (VR) pin.
    Type: Grant
    Filed: October 28, 1999
    Date of Patent: October 2, 2001
    Assignee: International Business Machines Corporation
    Inventors: Alan Harris Crudo, John Gillette Davis, Christian Robert Le Coz, Mark Vincent Pierson, Amit Kumar Sarkhel, Ajit Kumar Trivedi
  • Patent number: 6115912
    Abstract: A method and apparatus for efficiently repairing or reworking a printed circuit board having a solder ball grid array thereon efficiently and at minimum cost includes the steps of drilling out a plated-through hole to sever electrical connections between a ball grid array pad on one surface of the printed circuit board and internal circuits and circuits on an opposite surface of the printed circuit board; inserting a pin having an insulated sleeve surrounding a portion thereof into the drilled-out hole, the pin having attached to one end a wire for attachment to the ball grid array on one surface of the printed circuit board and a post at the other end of the pin for attachment of a wire to the post; the pin having a stop along its length to control vertical positioning of the pin in the drilled-out hole, the pin referred to as a via replacement (VR) pin.
    Type: Grant
    Filed: October 28, 1999
    Date of Patent: September 12, 2000
    Assignee: International Business Machines Corporation
    Inventors: Alan Harris Crudo, John Gillette Davis, Christian Robert Le Coz, Mark Vincent Pierson, Amit Kumar Sarkhel, Ajit Kumar Trivedi
  • Patent number: 6034875
    Abstract: A method and apparatus for cooling electrical components on a substrate during a rework process. A block of a porous, thermally conductive material, saturated with a liquid, is positioned on an electrical component to be cooled. During the rework processing of an adjacent electrical component, the liquid in the porous, thermally conductive block vaporizes, thereby maintaining the temperature of the electrical component below its reflow temperature. A second thermally conductive block, in thermal contact with the porous, thermally conductive block, and the substrate on which the electronic component to be cooled is attached, is positioned between the electronic component to be cooled and the electronic component undergoing rework. A supply of liquid is provided to the porous, thermally conductive block to maintain the temperature of the electronic component to be cooled at a predetermined level for a specified period of time.
    Type: Grant
    Filed: June 17, 1998
    Date of Patent: March 7, 2000
    Assignee: International Business Machines Corporation
    Inventors: Craig G. Heim, Wade Leslie Hooker, Ajit Kumar Trivedi
  • Patent number: 6018866
    Abstract: A method and apparatus for efficiently repairing or reworking a printed circuit board having a solder ball grid array thereon efficiently and at minimum cost includes the steps of drilling out a plated-through hole to sever electrical connections between a ball grid array pad on one surface of the printed circuit board and internal circuits and circuits on an opposite surface of the printed circuit board; inserting a pin having an insulated sleeve surrounding a portion thereof into the drilled-out hole, the pin having attached to one end a wire for attachment to the ball grid array on one surface of the printed circuit board and a post at the other end of the pin for attachment of a wire to the post; the pin having a stop along its length to control vertical positioning of the pin in the drilled-out hole, the pin referred to as a via replacement (VR) pin.
    Type: Grant
    Filed: February 13, 1998
    Date of Patent: February 1, 2000
    Assignee: International Business Machines Corporation
    Inventors: Alan Harris Crudo, John Gillette Davis, Christian Robert Le Coz, Mark Vincent Pierson, Amit Kumar Sarkhel, Ajit Kumar Trivedi
  • Patent number: 5809641
    Abstract: A method and apparatus for efficiently repairing or reworking a printed circuit board having a solder ball grid array thereon efficiently and at minimum cost includes the steps of drilling out a plated-through hole to sever electrical connections between a ball grid array pad on one surface of the printed circuit board and internal circuits and circuits on an opposite surface of the printed circuit board; inserting a pin having an insulated sleeve surrounding a portion thereof into the drilled-out hole, the pin having attached to one end a wire for attachment to the ball grid array on one surface of the printed circuit board and a post at the other end of the pin for attachment of a wire to the post; the pin having a stop along its length to control vertical positioning of the pin in the drilled-out hole, the pin referred to as a via replacement (VR) pin.
    Type: Grant
    Filed: April 25, 1996
    Date of Patent: September 22, 1998
    Assignee: International Business Machines Corporation
    Inventors: Alan Harris Crudo, John Gillette Davis, Christian Robert Le Coz, Mark Vincent Pierson, Amit Kumar Sarkhel, Ajit Kumar Trivedi
  • Patent number: 5685070
    Abstract: A printed circuit board or card for direct chip attachment that includes at least one power core, at least one signal plane that is adjacent to the power core, and plated through holes for electrical connection is provided. In addition, a layer of dielectric material is adjacent the power core and a circuitized conductive layer is adjacent the dielectric material, followed by a layer of photosensitive dielectric material adjacent the conductive layer. Photodeveloped blind vias for subsequent connection to the power core and drilled blind vias for subsequent connection to the signal plane are provided. Also provided is process for fabricating the printed circuit board or card for direct chip attachment.
    Type: Grant
    Filed: January 19, 1995
    Date of Patent: November 11, 1997
    Assignee: International Business Machines Corporation
    Inventors: Warren Alan Alpaugh, Voya Rista Markovich, Ajit Kumar Trivedi, Richard Stuart Zarr