Patents by Inventor Ajit Patil

Ajit Patil has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220301673
    Abstract: A system for continually regenerating adaptive, structured, reports in association with an image, the system comprising an imaging module (IM) to output images (I), a graphical user interface dashboard (GUI) to receive output images (I); a report regeneration module (RGT), an artificial imaging module (AIM) to graphically annotate each image (I) with a vector-defined boundary tag (VT) overlaid on the displayed image (I) and with to classify each image (I) with a classification label (CL), initializing a report (RP) to be generated and to be displayed, regenerating said initial report, to cause a first regenerated report, regenerating said first regenerated report, to cause an iteratively adapted regenerated report, to be displayed on said graphical user interface dashboard, said iteratively adapted regenerated report comprising pre-defined fields to be populated based on clinical diagnoses.
    Type: Application
    Filed: May 31, 2022
    Publication date: September 22, 2022
    Inventors: Amit Kharat, Aniruddha Pant, Ajit Patil
  • Patent number: 10521376
    Abstract: An apparatus may include a baseboard management controller (BMC) configured to monitor one or more statuses of a storage array enclosure of the BMC. The BMC may further communicate with a host device of a PCIe network topology via a PCIe port of the BMC including performing a direct memory access (DMA) write to store status information of the enclosure to a memory of the host device via the PCIe network topology and performing a DMA read to retrieve control information from the memory of the host device via the PCIe network topology. In addition, the BMC may control one or more devices of the storage array enclosure based on the retrieved control information.
    Type: Grant
    Filed: March 15, 2018
    Date of Patent: December 31, 2019
    Assignee: Seagate Technology LLC
    Inventors: Sumanranjan Mitra, Ajit Patil, Sivaprakash Rajaram
  • Publication number: 20070192610
    Abstract: Techniques to securely boot up an electronics device (e.g., a cellular phone) from an external storage device are described. Secure data (e.g., a hash digest, a signature, a cryptographic key, and so on) is initially retrieved from a non-writable area of an external memory device (e.g., an one-time programmable (OTP) area of a NAND Flash device). A first program (e.g., a boot program) is retrieved from a writable or main area of the external memory device and authenticated based on the secure data. The first program is enabled for execution if authenticated. A second program may be retrieved from the main area of the external memory device and authenticated based on the secure data. The second program is enabled for execution if authenticated. Additional programs may be retrieved and authenticated. Each program may be authenticated using a secure hash function, a digital signature, and/or some other cryptographic technique.
    Type: Application
    Filed: February 10, 2006
    Publication date: August 16, 2007
    Inventors: Dexter Chun, Ajit Patil, Cuneyt Fitoz, Dwight Gordon, Yu-Hsiang Huang, Oliver Michaelis
  • Patent number: 7061804
    Abstract: Techniques for quickly and reliably accessing a memory device (e.g., a NAND Flash memory) with adaptive interface timing are described. For memory access with adaptive interface timing, the NAND Flash memory is accessed at an initial memory access rate, which may be the rate predicted to achieve reliable memory access. Error correction coding (ECC), which is often employed for NAND Flash memory, is then used to ensure reliable access of the NAND Flash. For a read operation, one page of data is read at a time from the NAND Flash memory, and the ECC determines whether the page read from the NAND Flash memory contains any errors. If errors are encountered, then a slower memory access rate is selected, and the page with error is read again from the NAND Flash memory at the new rate. The techniques may be used to write data to the NAND Flash memory.
    Type: Grant
    Filed: November 18, 2004
    Date of Patent: June 13, 2006
    Assignee: QUALCOMM Incorporated
    Inventors: Dexter Tamio Chun, Ajit Patil, Ian Huang, Jason Chan, Timothy Gold
  • Publication number: 20060104115
    Abstract: Techniques for quickly and reliably accessing a memory device (e.g., a NAND Flash memory) with adaptive interface timing are described. For memory access with adaptive interface timing, the NAND Flash memory is accessed at an initial memory access rate, which may be the rate predicted to achieve reliable memory access. Error correction coding (ECC), which is often employed for NAND Flash memory, is then used to ensure reliable access of the NAND Flash. For a read operation, one page of data is read at a time from the NAND Flash memory, and the ECC determines whether the page read from the NAND Flash memory contains any errors. If errors are encountered, then a slower memory access rate is selected, and the page with error is read again from the NAND Flash memory at the new rate. The techniques may be used to write data to the NAND Flash memory.
    Type: Application
    Filed: November 18, 2004
    Publication date: May 18, 2006
    Inventors: Dexter Chun, Ajit Patil, Ian Huang, Jason Chan, Timothy Gold
  • Patent number: D949895
    Type: Grant
    Filed: October 2, 2020
    Date of Patent: April 26, 2022
    Assignee: DeepTek Inc.
    Inventors: Amit Kharat, Aniruddha Pant, Ajit Patil, Vinit Mandhre, Viraj Kulkarni
  • Patent number: D949896
    Type: Grant
    Filed: October 2, 2020
    Date of Patent: April 26, 2022
    Assignee: DeepTek Inc.
    Inventors: Amit Kharat, Aniruddha Pant, Ajit Patil, Vinit Mandhre, Viraj Kulkarni
  • Patent number: D949897
    Type: Grant
    Filed: October 2, 2020
    Date of Patent: April 26, 2022
    Assignee: DeepTekInc.
    Inventors: Amit Kharat, Aniruddha Pant, Ajit Patil, Vinit Mandhre, Viraj Kulkarni
  • Patent number: D950592
    Type: Grant
    Filed: October 2, 2020
    Date of Patent: May 3, 2022
    Assignee: DeepTek Inc.
    Inventors: Amit Kharat, Aniruddha Pant, Ajit Patil, Vinit Mandhre, Viraj Kulkarni
  • Patent number: D950593
    Type: Grant
    Filed: October 2, 2020
    Date of Patent: May 3, 2022
    Assignee: DeepTek Inc.
    Inventors: Amit Kharat, Aniruddha Pant, Ajit Patil, Vinit Mandhre, Viraj Kulkarni