Patents by Inventor Ajit V. Sathe
Ajit V. Sathe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8952511Abstract: Embodiments of a bottom-side stiffening element are disclosed. The stiffening element may be disposed between an integrated circuit package and an underlying circuit board. In some embodiments, the stiffening element is attached to the underlying circuit board. Other embodiments are described and claimed.Type: GrantFiled: December 18, 2007Date of Patent: February 10, 2015Assignee: Intel CorporationInventors: Ajit V. Sathe, Mat J. Manusharow, Tong Wa Chao
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Publication number: 20130005162Abstract: Electronic assemblies and their manufacture are described. One assembly includes a land grid array package including a plurality of land contacts. The assembly also includes a first socket adapted to engage a first group of the plurality of land contacts, and a second socket adapted to engage a second group of the plurality of land contacts. The first socket and the second socket are each coupled to a board. The first socket and the second socket are separate structures on the board. Other embodiments are described and claimed.Type: ApplicationFiled: July 1, 2011Publication date: January 3, 2013Inventors: Debendra MALLIK, Ajit V. SATHE
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Patent number: 7589395Abstract: Application of underfill material may be controlled to minimize the formation of voids between a plurality of integrated circuit (“IC”) dice and a substrate in an IC package. One or more elements are located in a gap between two dice to control the flow of underfill material and minimize the formation of voids within the underfill material. In an embodiment, an element may be an active electrical component, a passive electrical component, or a non-functional electrical component. Methods of fabrication, as well as application of the package to an electronic assembly and to an electronic system, are also described.Type: GrantFiled: June 30, 2006Date of Patent: September 15, 2009Assignee: Intel CorporationInventors: Ajit V. Sathe, Mathew J. Manusharow, Sung-Won Moon
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Publication number: 20090152738Abstract: Embodiments of a bottom-side stiffening element are disclosed. The stiffening element may be disposed between an integrated circuit package and an underlying circuit board. In some embodiments, the stiffening element is attached to the underlying circuit board. Other embodiments are described and claimed.Type: ApplicationFiled: December 18, 2007Publication date: June 18, 2009Inventors: Ajit V. Sathe, Mat J. Manusharow, Tong Wa Chao
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Publication number: 20080001310Abstract: Application of underfill material may be controlled to minimize the formation of voids between a plurality of integrated circuit (“IC”) dice and a substrate in an IC package. One or more elements are located in a gap between two dice to control the flow of underfill material and minimize the formation of voids within the underfill material. In an embodiment, an element may be an active electrical component, a passive electrical component, or a non-functional electrical component. Methods of fabrication, as well as application of the package to an electronic assembly and to an electronic system, are also described.Type: ApplicationFiled: June 30, 2006Publication date: January 3, 2008Inventors: Ajit V. Sathe, Mathew J. Manusharow, Sung-Won Moon
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Patent number: 7253523Abstract: A process of making a reworkable thermal interface material is described. The reworkable thermal interface material is bonded to a die and a heat sink. The reworkable thermal interface material includes a phase-change polymer matrix material. Other materials in the reworkable thermal interface material can include heat transfer particles and low melting-point metal particles. The phase-change polymer matrix material includes a melting temperature below a selected temperature and the heat transfer particles have a melting temperature substantially above the selected temperature. The heat transfer particles act as a spacer limit, which holds the thermal interface material to a given bond-line thickness during use.Type: GrantFiled: July 29, 2003Date of Patent: August 7, 2007Assignee: Intel CorporationInventors: Ashay A. Dani, Scott Gilbert, Ajit V. Sathe, Ravi Prasher
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Patent number: 7159313Abstract: To decrease the thickness, or stack height, of an electronics package, the package includes a solderless compression connector between an integrated circuit (IC) package and a substrate such as a printed circuit board (PCB). In one embodiment, the IC package is mounted on the substrate using a land grid array arrangement. Corresponding lands on the IC package and substrate are coupled using a solderless compression connector. The compression connector includes a plurality of electrically conductive particles, and a thin, flexible apertured support that aligns the particles with corresponding lands on the IC package and substrate. A compression connector may also be used to electrically couple an IC to an IC package substrate. Methods of fabrication, as well as application of the package to an electronic assembly, an electronic system, and a data processing system, are also described.Type: GrantFiled: November 30, 2004Date of Patent: January 9, 2007Assignee: Intel CorporationInventors: Ajit V. Sathe, Paul H. Wermer
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Patent number: 6903278Abstract: In substrate packaging and mounting, such as for a flip chip mounted on a thin-core or coreless substrate, a high degree of rigidness and support is imparted to the substrate, to overcome bending/flexing/distortion during mounting/packaging of the chip and to prevent possible chip damage, by a stiffener. Such a stiffener may be of one or multiple pieces in any suitable shape/form to allow its non-interfering positioning on the substrate, and made by any suitable process of any suitable material, including conductive material and material capable of withstanding the temperatures of chip mounting/bonding operations. Such a stiffener prevents bending/flexing/distortion of thin-core and coreless substrate arrangements during mounting/interconnection processes to achieve thinner and more light-weight electronics specifically afforded by thin-core/coreless substrate arrangements while lowering manufacturing time/costs.Type: GrantFiled: June 29, 2001Date of Patent: June 7, 2005Assignee: Intel CorporationInventor: Ajit V. Sathe
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Patent number: 6840777Abstract: To decrease the thickness, or stack height, of an electronics package, the package includes a solderless compression connector between an integrated circuit (IC) package and a substrate such as a printed circuit board (PCB). In one embodiment, the IC package is mounted on the substrate using a land grid array arrangement. Corresponding lands on the IC package and substrate are coupled using a solderless compression connector. The compression connector includes a plurality of electrically conductive elements, such as compressible button contacts, and an apertured support that aligns the button contacts with corresponding lands on the IC package and substrate. In another embodiment, the connector includes electrically conductive pins embedded in a thin plastic sheet. In a further embodiment, the connector includes a microcrystalline film having electrically conductive crystals. In a further embodiment, the compression connector is used within an IC package to couple an IC to an IC package substrate.Type: GrantFiled: November 30, 2000Date of Patent: January 11, 2005Assignee: Intel CorporationInventors: Ajit V. Sathe, Paul H. Wermer
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Patent number: 6800947Abstract: To decrease the weight and the thickness, and to increase the flexibility, of an electronics package, the package includes an integrated circuit (IC) mounted on a flexible tape substrate. In one embodiment, an IC is mounted on a flexible tape substrate using a ball grid array arrangement; however, other arrangements, including lead bonding, can be used. The flexible tape substrate can comprise conductive traces, vias, and patterns of lands on one or more layers. Methods of fabrication, as well as application of the flexible tape package to an electronic assembly, an electronic system, and a data processing system, are also described.Type: GrantFiled: June 27, 2001Date of Patent: October 5, 2004Assignee: Intel CorporationInventor: Ajit V. Sathe
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Patent number: 6661660Abstract: Two types of thermal management devices for efficiently dissipating heat generated by high performance electronic devices, such as microprocessors for desktop and server computers producing a power of near 200 Watts and high power electronic devices that are small and thin, such as those used in telephones, radios, laptop computers, and handheld devices. An integrated heat sink and spreader for cooling an item has a vapor chamber heat sink with a thinner first wall and a thicker second wall. The thicker second wall is engageable with the item in efficient heat transferring relationship. A plurality of heat-radiating fins are attached to the thinner first wall. An embedded direct heat pipe attachment includes a heat pipe embedded in a spreader plate that is in direct heat transferring contact with an item through a thin, uniform layer of thermal interface material.Type: GrantFiled: October 4, 2001Date of Patent: December 9, 2003Assignee: Intel CorporationInventors: Ravi Prasher, Abhay A. Watwe, Gregory M. Chrysler, Kristopher Frutschy, Leo Ofman, Ajit V. Sathe
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Patent number: 6639799Abstract: Two types of thermal management devices for efficiently dissipating heat generated by high performance electronic devices, such as microprocessors for desktop and server computers producing a power of near 200 Watts and high power electronic devices that are small and thin, such as those used in telephones, radios, laptop computers, and handheld devices. An integrated heat sink and spreader for cooling an item has a vapor chamber heat sink with a thinner first wall and a thicker second wall. The thicker second wall is engageable with the item in efficient heat transferring relationship. A plurality of heat-radiating fins are attached to the thinner first wall. An embedded direct heat pipe attachment includes a heat pipe embedded in a spreader plate that is in direct heat transferring contact with an item through a thin, uniform layer of thermal interface material.Type: GrantFiled: December 22, 2000Date of Patent: October 28, 2003Assignee: Intel CorporationInventors: Ravi Prasher, Abhay A. Watwe, Gregory M. Chrysler, Kristopher Frutschy, Leo Ofman, Ajit V. Sathe
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Patent number: 6535386Abstract: An electronic assembly is described including a motherboard, a semiconductor die mounted to the motherboard, and a heat pipe having an evaporator portion adjacent the die, and a condenser portion distant from the die. The heat pipe is connected to a ground plane of the motherboard at various locations. Structural integrity of the heat pipe is provided by an insert in an evaporator portion of the heat pipe and because of opposing recessed seat portions that contact one another. Another feature of the electronic assembly is that it has a sheet of material forming a plurality of fins that are welded to a condenser portion of the heat pipe.Type: GrantFiled: December 5, 2000Date of Patent: March 18, 2003Assignee: Intel CorporationInventors: Ajit V. Sathe, Michael J. Witherspoon, Ravi S. Prasher, Kristopher J. Frutschy
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Publication number: 20030000736Abstract: In substrate packaging and mounting, such as for a flip chip mounted on a thin-core or coreless substrate, a high degree of rigidness and support is imparted to the substrate, to overcome bending/flexing/distortion during mounting/packaging of the chip and to prevent possible chip damage, by a stiffener. Such a stiffener may be of one or multiple pieces in any suitable shape/form to allow its non-interfering positioning on the substrate, and made by any suitable process of any suitable material, including conductive material and material capable of withstanding the temperatures of chip mounting/bonding operations. Such a stiffener prevents bending/flexing/distortion of thin-core and coreless substrate arrangements during mounting/interconnection processes to achieve thinner and more light-weight electronics specifically afforded by thin-core/coreless substrate arrangements while lowering manufacturing time/costs.Type: ApplicationFiled: June 29, 2001Publication date: January 2, 2003Inventor: Ajit V. Sathe
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Publication number: 20030001287Abstract: To decrease the weight and the thickness, and to increase the flexibility, of an electronics package, the package includes an integrated circuit (IC) mounted on a flexible tape substrate. In one embodiment, an IC is mounted on a flexible tape substrate using a ball grid array arrangement; however, other arrangements, including lead bonding, can be used. The flexible tape substrate can comprise conductive traces, vias, and patterns of lands on one or more layers. Methods of fabrication, as well as application of the flexible tape package to an electronic assembly, an electronic system, and a data processing system, are also described.Type: ApplicationFiled: June 27, 2001Publication date: January 2, 2003Applicant: Intel CorporationInventor: Ajit V. Sathe
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Publication number: 20020080584Abstract: Two types of thermal management devices for efficiently dissipating heat generated by high performance electronic devices, such as microprocessors for desktop and server computers producing a power of near 200 Watts and high power electronic devices that are small and thin, such as those used in telephones, radios, laptop computers, and handheld devices. An integrated heat sink and spreader for cooling an item has a vapor chamber heat sink with a thinner first wall and a thicker second wall. The thicker second wall is engageable with the item in efficient heat transferring relationship. A plurality of heat-radiating fins are attached to the thinner first wall. An embedded direct heat pipe attachment includes a heat pipe embedded in a spreader plate that is in direct heat transferring contact with an item through a thin, uniform layer of thermal interface material.Type: ApplicationFiled: October 4, 2001Publication date: June 27, 2002Applicant: Intel Corporation.Inventors: Ravi Prasher, Abhay A. Watwe, Gregory M. Chrysler, Kristopher Frutschy, Leo Ofman, Ajit V. Sathe
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Publication number: 20020080583Abstract: Two types of thermal management devices for efficiently dissipating heat generated by high performance electronic devices, such as microprocessors for desktop and server computers producing a power of near 200 Watts and high power electronic devices that are small and thin, such as those used in telephones, radios, laptop computers, and handheld devices. An integrated heat sink and spreader for cooling an item has a vapor chamber heat sink with a thinner first wall and a thicker second wall. The thicker second wall is engageable with the item in efficient heat transferring relationship. A plurality of heat-radiating fins are attached to the thinner first wall. An embedded direct heat pipe attachment includes a heat pipe embedded in a spreader plate that is in direct heat transferring contact with an item through a thin, uniform layer of thermal interface material.Type: ApplicationFiled: December 22, 2000Publication date: June 27, 2002Inventors: Ravi Prasher, Abhay A. Watwe, Gregory M. Chrysler, Kristopher Frutschy, Leo Ofman, Ajit V. Sathe
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Publication number: 20020067598Abstract: An electronic assembly is described including a motherboard, a semiconductor die mounted to the motherboard, and a heat pipe having an evaporator portion adjacent the die, and a condenser portion distant from the die. The heat pipe is connected to a ground plane of the motherboard at various locations. Structural integrity of the heat pipe is provided by an insert in an evaporator portion of the heat pipe and because of opposing recessed seat portions that contact one another. Another feature of the electronic assembly is that it has a sheet of material forming a plurality of fins that are welded to a condenser portion of the heat pipe.Type: ApplicationFiled: December 5, 2000Publication date: June 6, 2002Inventors: Ajit V. Sathe, Michael J. Witherspoon, Ravi S. Prasher, Kristopher J. Frutschy
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Publication number: 20020065965Abstract: To decrease the thickness, or stack height, of an electronics package, the package includes a solderless compression connector between an integrated circuit (IC) package and a substrate such as a printed circuit board (PCB). In one embodiment, the IC package is mounted on the substrate using a land grid array arrangement. Corresponding lands on the IC package and substrate are coupled using a solderless compression connector. The compression connector includes a plurality of electrically conductive elements, such as compressible button contacts, and an apertured support that aligns the button contacts with corresponding lands on the IC package and substrate. In another embodiment, the connector includes electrically conductive pins embedded in a thin plastic sheet. In a further embodiment, the connector includes a microcrystalline film having electrically conductive crystals. In a further embodiment, the compression connector is used within an IC package to couple an IC to an IC package substrate.Type: ApplicationFiled: November 30, 2000Publication date: May 30, 2002Applicant: Intel CorporationInventors: Ajit V. Sathe, Paul H. Wermer