Patents by Inventor Ajith Kumar Battaje

Ajith Kumar Battaje has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180336125
    Abstract: A data storage apparatus that includes a storage device and a processor coupled to the storage device. The processor is configured to receive a read request for a first translation table entry associated with a logical block, identify a dump unit associated with the logical block using a hash function, determine a dump group associated with the dump unit, and identify a second translation table entry associated with the dump unit.
    Type: Application
    Filed: July 31, 2018
    Publication date: November 22, 2018
    Inventors: Ajith Kumar Battaje, Tanay Goel, Sandeep Sharma, Saurabh Manchanda, Arun Kumar Medapati
  • Publication number: 20180329637
    Abstract: A data storage apparatus that includes a storage device and a processor coupled to the storage device. The processor is configured to receive in a memory, a first logical block entry for a first dump group and a second logical block entry for a second dump group; store in a reverse translation table, the first logical block entry for the first dump group and the second logical block entry for the second dump group; determine a first sequence number associated with the stored first logical block entry and the stored second logical block entry in the reverse translation table, wherein the first sequence number is a snapshot marker that determines a timestamp associated with the first logical block and the second logical block; and persist the first logical block entry for the first dump group in the storage device.
    Type: Application
    Filed: July 20, 2018
    Publication date: November 15, 2018
    Inventors: Ajith Kumar Battaje, Tanay Goel, Rajendra Prasad Mishra
  • Publication number: 20180307432
    Abstract: Various aspects for managing data blocks in a storage system are provided. For instance, a method may include storing, in a buffer memory device, a comparison block library, selecting a first set of comparison blocks in the comparison block library to create an active set of comparison blocks, and utilizing the active set in conjunction with a data deduplication technique. A method may further include determining an occurrence of a predetermined event in the data deduplication technique, selecting a second set of comparison blocks in the comparison block library to create a new active set of comparison blocks in response to the predetermined event, replacing the active set with the new active set, and utilizing the new active set in conjunction with the data deduplication technique.
    Type: Application
    Filed: April 20, 2017
    Publication date: October 25, 2018
    Inventors: Ajith Kumar Battaje, Tanay Goel, Saurabh Manchanda, Sandeep Sharma
  • Patent number: 10068650
    Abstract: A sequence of contiguous pages in an erase block in a non-volatile memory device is programmed and erased. Next, all of the pages in the erase block are programmed with data. Then, the data is read back and verified to determine whether there is an error in the data. When there is an error in the data, then the last page in the sequence is identified as being unstable. If there is no error in the data, then the last page in that sequence is identified as being stable. Thus, the recorded information identifies a point of instability in the erase block. Instabilities can be stabilized by performing additional writes to fill the partially filled word line.
    Type: Grant
    Filed: April 10, 2017
    Date of Patent: September 4, 2018
    Assignee: Western Digital Technologies, Inc.
    Inventors: Ajith Kumar Battaje, Mahesh Mandya Vardhamanaiah, Ashwin Narasimha, Sandeep Sharma
  • Patent number: 10031680
    Abstract: A system comprising a processor and a memory storing instructions that, when executed, cause the system to identify a plurality of dump units associated with a translation table in a storage device, determine a plurality of snapshot markers associated with the plurality of dump units, calculate a first value of a first snapshot marker from the plurality of snapshot markers in the storage device, identify a second snapshot marker from an additional source, the second snapshot marker having a second value satisfying the first value, retrieve a dump unit associated with the second snapshot marker from the additional source, and reconstruct the translation table using the dump unit.
    Type: Grant
    Filed: June 29, 2016
    Date of Patent: July 24, 2018
    Assignee: HGST Netherlands B.V.
    Inventors: Ajith Kumar Battaje, Tanay Goel, Rajendra Prasad Mishra
  • Patent number: 9921896
    Abstract: A memory apparatus and methods are provided for preventing read errors on weak pages in a non-volatile memory system. In one example, a method includes identifying a weak page in a non-volatile memory device along a word line, wherein the weak page is partially written with at least some data; buffering data associated with the weak page to a weak page buffer that is coupled in communication with the non-volatile memory device; determining that an amount of data in the weak page buffer has reached a predetermined data level; and writing the data from the weak page buffer into the weak page along the word line in the non-volatile memory device.
    Type: Grant
    Filed: February 10, 2014
    Date of Patent: March 20, 2018
    Assignee: Virident Systems, LLC
    Inventors: Ashwin Narasimha, Vibhor Patale, Sandeep Sharma, Ajith Kumar Battaje
  • Publication number: 20180032261
    Abstract: A system and method for efficiently managing data through compression interfaces may include receiving, by a controller, data, generating, by the controller, a compressed payload based on the data, generating, by the controller, metadata describing the compressed payload, the metadata including fixed size metadata and variable size metadata, generating, by the controller, a data container comprising the uncompressed payload and the metadata, and transmitting, by the controller, the data container to an application. Some implementations of the system may include a storage media, and a storage controller executable by a processor that may include an interface processor, a controller logic, and a media processor configured to communicate with an application and the storage media to perform aspects of the method.
    Type: Application
    Filed: June 13, 2017
    Publication date: February 1, 2018
    Inventors: Ashish Singhai, Ajith Kumar Battaje, Sandeep Sharma, Saurabh Manchanda
  • Publication number: 20180004656
    Abstract: A system comprising a processor and a memory storing instructions that, when executed, cause the system to receive a request to select translation table entries to store in a storage device, determine a plurality of translation table entries associated with a dump unit, allocate the plurality of translation table entries into a first group of translation table entries associated with a first node and a second group of translation table entries associated with a second node, the first group of translation table entries being frequently accessed and the second group of translation table entries being rarely accessed. determine a first status associated with a first recent access bit for a first translation table entry, the first translation table entry being included in the first group of translation table entries, and add the first translation table entry to the second group of translation table entries.
    Type: Application
    Filed: June 29, 2016
    Publication date: January 4, 2018
    Inventors: Ajith Kumar Battaje, Tanay Goel, Rajendra Prasad Mishra
  • Publication number: 20180004650
    Abstract: A system comprising a processor and a memory storing instructions that, when executed, cause the system to receive a first translation table entry for a logical block, map the first translation table entry to a first dump unit, the first dump unit included in an array of dump units, identify a second translation table entry for the logical block in the first dump unit, the second translation table entry also being stored in a storage device, and generate a linked list in the storage device from the second translation table entry associated with the first dump unit, the linked list identifying previous translation table entries associated with the logical block.
    Type: Application
    Filed: June 29, 2016
    Publication date: January 4, 2018
    Inventors: Ajith Kumar Battaje, Tanay Goel, Sandeep Sharma, Saurabh Manchanda, Arun Kumar Medapati
  • Publication number: 20180004652
    Abstract: A system comprising a processor and a memory storing instructions that, when executed, cause the system to receive a request for garbage collection, identify a range of physical blocks in a storage device, query a bitmap, the bitmap having a bit for each physical block in the range of physical blocks, determine a status associated with a first bit from the bitmap, in response to determining the status associated with the first bit is a first state, add a first physical block associated with the first bit to a list of physical blocks for relocation, and relocate the list of physical blocks.
    Type: Application
    Filed: June 29, 2016
    Publication date: January 4, 2018
    Inventors: Ajith Kumar Battaje, Tanay Goel, Rajendra Prasad Mishra
  • Publication number: 20180004437
    Abstract: A system comprising a processor and a memory storing instructions that, when executed, cause the system to identify a plurality of dump units associated with a translation table in a storage device, determine a plurality of snapshot markers associated with the plurality of dump units, calculate a first value of a first snapshot marker from the plurality of snapshot markers in the storage device, identify a second snapshot marker from an additional source, the second snapshot marker having a second value satisfying the first value, retrieve a dump unit associated with the second snapshot marker from the additional source, and reconstruct the translation table using the dump unit.
    Type: Application
    Filed: June 29, 2016
    Publication date: January 4, 2018
    Inventors: Ajith Kumar Battaje, Tanay Goel, Rajendra Prasad Mishra
  • Publication number: 20180004651
    Abstract: A system comprising a processor and a memory storing instructions that, when executed, cause the system to determine a first value of a first checkpoint associated with a first snapshot, receive a second value of a second checkpoint associated with a translation table entry from an additional source, determine whether the second value of the second checkpoint is after the first value of the first checkpoint, in response to determining that the second value of the second checkpoint is after the first value of the first checkpoint, retrieve the translation table entry associated with the second checkpoint from the additional source, and reconstruct the translation table using the translation table entry associated with the second checkpoint.
    Type: Application
    Filed: June 29, 2016
    Publication date: January 4, 2018
    Inventors: Ajith Kumar Battaje, Tanay Goel, Sandeep Sharma, Saurabh Manchanda, Ashish Singhai, Vijay Karamcheti
  • Publication number: 20170293450
    Abstract: A system and method for integrating flash management and deduplication with marker based reference set handling may include a dynamic reference set that is elastic and can include non-contiguous reference blocks. The method may further include determining the first reference block of the plurality of reference blocks for continued encoding, the first reference block having an identifier, and associating the identifier of the first reference block with a second reference set. Some implementations of the method may further include receiving a first plurality of data blocks in an incoming data stream, the first plurality of data blocks including a first data block, and encoding the first data block using the first reference block associated with the second reference set.
    Type: Application
    Filed: April 11, 2016
    Publication date: October 12, 2017
    Inventors: Ajith Kumar Battaje, Tanay Goel, Saurabh Manchanda, Sandeep Sharma
  • Patent number: 9620227
    Abstract: A sequence of contiguous pages in an erase block in a non-volatile memory device is programmed and erased. Next, all of the pages in the erase block are programmed with data. Then, the data is read back and verified to determine whether there is an error in the data. When there is an error in the data, then the last page in the sequence is identified as being unstable. If there is no error in the data, then the last page in that sequence is identified as being stable. Thus, the recorded information identifies a point of instability in the erase block. Instabilities can be stabilized by performing additional writes to fill the partially filled word line.
    Type: Grant
    Filed: January 8, 2016
    Date of Patent: April 11, 2017
    Assignee: Western Digital Technologies, Inc.
    Inventors: Ajith Kumar Battaje, Mahesh Mandya Vardhamanaiah, Ashwin Narasimha, Sandeep Sharma