Patents by Inventor Ajith Prasad

Ajith Prasad has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Staggered time zones
    Patent number: 7668948
    Abstract: A method, apparatus, and system for staggering time zones.
    Type: Grant
    Filed: December 31, 2002
    Date of Patent: February 23, 2010
    Assignee: Intel Corporation
    Inventors: Ajith Prasad, Vishram Sarurkar, Simon Sabato
  • Methods and apparatus for asserting flow control at input ports of a shared-memory switch
    Patent number: 7321553
    Abstract: In a method of allocating a shared resource among a plurality of competing applicants, a share of the resource allocated to one of the applicants is limited on the basis of a current proportion of the resource allocated to the applicant and a total of respective shares of the resource currently allocated to all of the applicants.
    Type: Grant
    Filed: July 22, 2003
    Date of Patent: January 22, 2008
    Assignee: Intel Corporation
    Inventors: Ajith Prasad, Ananthan Ayyasamy, Jain Philip, Paritosh Joshi
  • At speed testing asynchronous signals
    Patent number: 6918074
    Abstract: A testing device uses an input signature register to conduct “at speed” testing of asynchronous circuit responses in an effort to determine the operability of a monitored circuit. Upon receiving an enable signal, the input signature register quickly measures, compresses, and transmits the tested circuit responses so that the responses can be compared with a set of anticipated responses to determine whether the circuit is functioning properly. The enabled input signature register, such as a MISR or a SISR, generates an output signature, which contains the compressed responses of the monitored circuit and helps the testing device analyze circuit performance.
    Type: Grant
    Filed: June 28, 2002
    Date of Patent: July 12, 2005
    Assignee: Intel Corporation
    Inventors: Kee Sup Kim, Shyang-Tai Sean Su, Adarsh Kalliat, Ajith Prasad
  • Staggered time zones
    Publication number: 20050071395
    Abstract: A method, apparatus, and system for staggering time zones.
    Type: Application
    Filed: December 31, 2002
    Publication date: March 31, 2005
    Inventors: Ajith Prasad, Vishram Sarurkar, Simon Sabato
  • Methods and apparatus for asserting flow control at input ports of a shared-memory switch
    Publication number: 20050018708
    Abstract: In a method of allocating a shared resource among a plurality of competing applicants, a share of the resource allocated to one of the applicants is limited on the basis of a current proportion of the resource allocated to the applicant and a total of respective shares of the resource currently allocated to all of the applicants.
    Type: Application
    Filed: July 22, 2003
    Publication date: January 27, 2005
    Inventors: Ajith Prasad, Ananthan Ayyasamy, Jain Philip, Paritosh Joshi
  • Apparatus, system and method for performing table maintenance
    Publication number: 20050010683
    Abstract: A method, apparatus, and system for maintaining an uncorrupted table.
    Type: Application
    Filed: June 30, 2003
    Publication date: January 13, 2005
    Inventors: Prabhanjan Moleyar, Vishram Sarurkar, Himanshu Goel, Ajith Prasad, Muralidharan Chilukoor
  • Apparatus, system and method for limiting latency
    Publication number: 20040117791
    Abstract: A method, apparatus, and system for limiting latency.
    Type: Application
    Filed: December 17, 2002
    Publication date: June 17, 2004
    Inventors: Ajith Prasad, Jain Philip, Ananthan Ayyasamy, Prabhanjan Moleyar
  • Method and apparatus for address lookup
    Publication number: 20040042463
    Abstract: An address lookup device provides information for a lookup value. A lookup value based on a network address in a received packet is received by a discriminant bits search device. A discriminant bits pattern is used to determine a location in an address lookup table based on the lookup value. The discriminant bits search device determines whether the lookup value is located in the location in the address lookup table. The discriminant bits search device outputs next hop information if the lookup value is located in the location in the address lookup table, and outputs default information if the lookup value is not located in the location in the address lookup table.
    Type: Application
    Filed: August 30, 2002
    Publication date: March 4, 2004
    Applicant: Intel Corporation
    Inventors: Miguel A. Guerrero, Prabhanjan Moleyar, Ajith Prasad, Muralidharan Chilukoor, Simon L. Sabato
  • At speed testing of asynchronous signals
    Publication number: 20040003332
    Abstract: A testing device uses an input signature register to conduct “at speed” testing of asynchronous circuit responses in an effort to determine the operability of a monitored circuit. Upon receiving an enable signal, the input signature register quickly measures, compresses, and transmits the tested circuit responses so that the responses can be compared with a set of anticipated responses to determine whether the circuit is functioning properly. The enabled input signature register, such as a MISR or a SISR, generates an output signature, which contains the compressed responses of the monitored circuit and helps the testing device analyze circuit performance.
    Type: Application
    Filed: June 28, 2002
    Publication date: January 1, 2004
    Inventors: Kee Sup Kim, Shyang-Tai Sean Su, Adarsh Kalliat, Ajith Prasad