Abstract: An information processing apparatus includes: a memory; and a processor coupled to the memory and configured to: control execution of synchronization processing of data written along with operations of a plurality of processes; refer to the memory in which an allowable time at an execution time of first synchronization processing performed on synchronization target data written along with operations of the plurality of processes; calculate a first data amount for which an executing time of synchronization falls within the allowable time; and perform second synchronization processing on the synchronization target data in response to a fact that a second data amount of the synchronization target data has reached the first data amount.

Abstract: An information processing device of deploying containers on a plurality of physical machines includes: memory configured to store operation history information, the operation history information corresponding to each of the containers deployed on the plurality of physical machines; and processor circuitry coupled to the memory, the processor circuitry being configured to perform processing, the processing including: in response that a first container is to be deployed, identifying from the operation history information a reason why the first container is to be deployed; and determining a physical machine from among the plurality of physical machines by using the reason identified to use the determined physical machine as a target physical machine on which the first container is to be deployed.

Abstract: An information processing system includes: a first information processing apparatus coupled to a first storage and including a first processor configured to execute, when a virtual processor operated in the first information processing apparatus executes an I/O processing for the first storage, a copy processing of copying target data of the I/O processing from the first storage to a second storage coupled to a second information processing apparatus, as a pre-processing of a relocation processing in which the virtual processor is relocated from the first information processing apparatus to the second information processing apparatus; and a management device including a second processor configured to: determine an execution timing of the relocation processing based on a performance influence level of I/O processings executed by the virtual processor after relocation; and output an instruction of executing the relocation processing at the execution timing to the first information processing apparatus.

Abstract: An information processing device of deploying containers on a plurality of physical machines includes: memory configured to store operation history information, the operation history information corresponding to each of the containers deployed on the plurality of physical machines; and processor circuitry coupled to the memory, the processor circuitry being configured to perform processing, the processing including: in response that a first container is to be deployed, identifying from the operation history information a reason why the first container is to be deployed; and determining a physical machine from among the plurality of physical machines by using the reason identified to use the determined physical machine as a target physical machine on which the first container is to be deployed.

Abstract: An information processing apparatus includes: a memory; and a processor coupled to the memory and the processor configured to calculate shortening rates by comparing execution times for each of a plurality of functions in a case where an evaluation target program is executed in an execution environment with execution times for each of the plurality of functions in a case where the evaluation target program is executed in a simulation environment, and generate a simulation program to be used in the simulation environment based on the calculated shortening rates and the evaluation target program.

Abstract: An information processing apparatus includes: a memory; and a processor coupled to the memory and configured to: control execution of synchronization processing of data written along with operations of a plurality of processes; refer to the memory in which an allowable time at an execution time of first synchronization processing performed on synchronization target data written along with operations of the plurality of processes; calculate a first data amount for which an executing time of synchronization falls within the allowable time; and perform second synchronization processing on the synchronization target data in response to a fact that a second data amount of the synchronization target data has reached the first data amount.

Abstract: An information processing system includes: a first information processing apparatus coupled to a first storage and including a first processor configured to execute, when a virtual processor operated in the first information processing apparatus executes an I/O processing for the first storage, a copy processing of copying target data of the I/O processing from the first storage to a second storage coupled to a second information processing apparatus, as a pre-processing of a relocation processing in which the virtual processor is relocated from the first information processing apparatus to the second information processing apparatus; and a management device including a second processor configured to: determine an execution timing of the relocation processing based on a performance influence level of I/O processings executed by the virtual processor after relocation; and output an instruction of executing the relocation processing at the execution timing to the first information processing apparatus.

Abstract: An information processing apparatus includes: a memory; and a processor coupled to the memory and the processor configured to calculate shortening rates by comparing execution times for each of a plurality of functions in a case where an evaluation target program is executed in an execution environment with execution times for each of the plurality of functions in a case where the evaluation target program is executed in a simulation environment, and generate a simulation program to be used in the simulation environment based on the calculated shortening rates and the evaluation target program.

Abstract: A vibrating electrode plate that senses a sound pressure faces a counter electrode plate to constitute a capacitance type acoustic sensor. In the counter electrode plate, acoustic perforations are opened in order to pass vibration, and plural projections are provided on a surface facing the vibrating electrode plate. An interval between the projections is decreased in a region where the vibrating electrode plate has high flexibility to easily generate local sticking with the counter electrode plate. The interval between the projections is increased in a region where the vibrating electrode plate has low flexibility to hardly generate local sticking with the counter electrode plate. The projections thus arranged prevent firm fixing of the vibrating electrode plate to the counter electrode plate and interruption of vibration of the vibrating electrode plate.

Abstract: A vibrating electrode plate 24 that senses a sound pressure faces a counter electrode plate 25 to constitute a capacitance type acoustic sensor. In the counter electrode plate 25, acoustic perforations 31 are opened in order to pass vibration, and plural projections 36 are provided on a surface facing the vibrating electrode plate 24. An interval between the projections 36 is decreased in a region where the vibrating electrode plate 24 has high flexibility to easily generate local sticking with the counter electrode plate 25. The interval between the projections 36 is increased in a region where the vibrating electrode plate 24 has low flexibility to hardly generate local sticking with the counter electrode plate 25. The projections thus arranged prevent firm fixing of the vibrating electrode plate to the counter electrode plate and interruption of vibration of the vibrating electrode plate.