Patents by Inventor Akemi Moniwa

Akemi Moniwa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8835083
    Abstract: A manufacturing method of a photomask by which a resist pattern corresponding to a pattern with designed values can be formed, a method for optical proximity correction, and a manufacturing method of a semiconductor device are provided. Proximity design features that are close to each other and estimated to violate a mask rule check are extracted. In the proximity design features, correction prohibited regions where optical proximity correction is not carried out are set based on the distance between the features obtained from the extracted proximity design features and the resolution of an exposure device. Optical proximity correction is carried out on the proximity design features with the correction prohibited regions excluded to obtain corrected proximity patterns. A predetermined mask material is patterned by carrying out electron beam lithography based on the corrected proximity pattern data.
    Type: Grant
    Filed: October 2, 2013
    Date of Patent: September 16, 2014
    Assignee: Renesas Electronics Corporation
    Inventors: Ayumi Minamide, Akemi Moniwa, Akira Imai
  • Publication number: 20140030657
    Abstract: A manufacturing method of a photomask by which a resist pattern corresponding to a pattern with designed values can be formed, a method for optical proximity correction, and a manufacturing method of a semiconductor device are provided. Proximity design features that are close to each other and estimated to violate a mask rule check are extracted. In the proximity design features, correction prohibited regions where optical proximity correction is not carried out are set based on the distance between the features obtained from the extracted proximity design features and the resolution of an exposure device. Optical proximity correction is carried out on the proximity design features with the correction prohibited regions excluded to obtain corrected proximity patterns. A predetermined mask material is patterned by carrying out electron beam lithography based on the corrected proximity pattern data.
    Type: Application
    Filed: October 2, 2013
    Publication date: January 30, 2014
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Ayumi MINAMIDE, Akemi MONIWA, Akira IMAI
  • Patent number: 8563200
    Abstract: A manufacturing method of a photomask by which a resist pattern corresponding to a pattern with designed values can be formed, a method for optical proximity correction, and a manufacturing method of a semiconductor device are provided. Proximity design features that are close to each other and estimated to violate a mask rule check are extracted. In the proximity design features, correction prohibited regions where optical proximity correction is not carried out are set based on the distance between the features obtained from the extracted proximity design features and the resolution of an exposure device. Optical proximity correction is carried out on the proximity design features with the correction prohibited regions excluded to obtain corrected proximity patterns. A predetermined mask material is patterned by carrying out electron beam lithography based on the corrected proximity pattern data.
    Type: Grant
    Filed: January 6, 2012
    Date of Patent: October 22, 2013
    Assignee: Renesas Electronics Corporation
    Inventors: Ayumi Minamide, Akemi Moniwa, Akira Imai
  • Patent number: 8426087
    Abstract: A photomask is provided which can have a large depth of focus even if four main features are annularly arranged at random. The photomask has four annularly arranged main features based on design information of a circuit feature to be formed on a wafer, and a sub-feature is laid at an intersection point of two diagonal lines of a quadrangle formed by four vertices inside the four main features in order to increase a depth of focus of an exposure feature. Therefore, the depth of focus can be increased even if the main features are not arranged at a constant pitch.
    Type: Grant
    Filed: July 21, 2011
    Date of Patent: April 23, 2013
    Assignee: Renesas Electronics Corporation
    Inventors: Ayumi Minamide, Mitsuru Okuno, Akemi Moniwa, Manabu Ishibashi
  • Patent number: 8367309
    Abstract: A method of forming a pattern including a first pattern portion having a first minimum dimension and a second pattern portion having a second minimum dimension includes a first exposure step of performing exposure using a Levenson-type mask and a second exposure step of performing exposure using a half tone-type mask. When second minimum dimension is 1.3 time or more than the first minimum dimension, the exposure amount of the second exposure step is set to be equal to or smaller than the exposure amount of the first exposure step.
    Type: Grant
    Filed: October 12, 2011
    Date of Patent: February 5, 2013
    Assignee: Renesas Electronics Corporation
    Inventors: Mitsuru Okuno, Akemi Moniwa
  • Publication number: 20120183891
    Abstract: A manufacturing method of a photomask by which a resist pattern corresponding to a pattern with designed values can be formed, a method for optical proximity correction, and a manufacturing method of a semiconductor device are provided. Proximity design features that are close to each other and estimated to violate a mask rule check are extracted. In the proximity design features, correction prohibited regions where optical proximity correction is not carried out are set based on the distance between the features obtained from the extracted proximity design features and the resolution of an exposure device. Optical proximity correction is carried out on the proximity design features with the correction prohibited regions excluded to obtain corrected proximity patterns. A predetermined mask material is patterned by carrying out electron beam lithography based on the corrected proximity pattern data.
    Type: Application
    Filed: January 6, 2012
    Publication date: July 19, 2012
    Inventors: Ayumi MINAMIDE, Akemi MONIWA, Akira IMAI
  • Publication number: 20120052419
    Abstract: A photomask is provided which can have a large depth of focus even if four main features are annularly arranged at random. The photomask has four annularly arranged main features based on design information of a circuit feature to be formed on a wafer, and a sub-feature is laid at an intersection point of two diagonal lines of a quadrangle formed by four vertices inside the four main features in order to increase a depth of focus of an exposure feature. Therefore, the depth of focus can be increased even if the main features are not arranged at a constant pitch.
    Type: Application
    Filed: July 21, 2011
    Publication date: March 1, 2012
    Inventors: Ayumi MINAMIDE, Mitsuru Okuno, Akemi Moniwa, Manabu Ishibashi
  • Patent number: 8119308
    Abstract: A photomask is disclosed which can suppress deterioration of the depth of focus even in the case where main features are arranged randomly. Sub-features are replaced by a quadrangular sub-feature located inside an external quadrangle which includes as part of its outer periphery the outermost portions of the original sub-features. The sub-feature after the replacement is preferably in a square shape and the length of one side thereof is determined in accordance with the length of the associated external quadrangle. A central position of the sub-feature after the replacement is preferably coincident with the center of the external quadrangle or the center of gravity of the region which includes the original sub-features.
    Type: Grant
    Filed: February 27, 2009
    Date of Patent: February 21, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Ayumi Minamide, Akemi Moniwa, Junjiro Sakai, Manabu Ishibashi
  • Publication number: 20120028194
    Abstract: A method of forming a pattern including a first pattern portion having a first minimum dimension and a second pattern portion having a second minimum dimension includes a first exposure step of performing exposure using a Levenson-type mask and a second exposure step of performing exposure using a half tone-type mask. When second minimum dimension is 1.3 time or more than the first minimum dimension, the exposure amount of the second exposure step is set to be equal to or smaller than the exposure amount of the first exposure step.
    Type: Application
    Filed: October 12, 2011
    Publication date: February 2, 2012
    Applicant: Renesas Electronics Corporation
    Inventors: Mitsuru OKUNO, Akemi MONIWA
  • Patent number: 8071264
    Abstract: A method of forming a pattern including a first pattern portion having a first minimum dimension and a second pattern portion having a second minimum dimension includes a first exposure step of performing exposure using a Levenson-type mask and a second exposure step of performing exposure using a half tone-type mask. When second minimum dimension is 1.3 time or more than the first minimum dimension, the exposure amount of the second exposure step is set to be equal to or smaller than the exposure amount of the first exposure step.
    Type: Grant
    Filed: March 17, 2011
    Date of Patent: December 6, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Mitsuru Okuno, Akemi Moniwa
  • Publication number: 20110165520
    Abstract: A method of forming a pattern including a first pattern portion having a first minimum dimension and a second pattern portion having a second minimum dimension includes a first exposure step of performing exposure using a Levenson-type mask and a second exposure step of performing exposure using a half tone-type mask. When second minimum dimension is 1.3 time or more than the first minimum dimension, the exposure amount of the second exposure step is set to be equal to or smaller than the exposure amount of the first exposure step.
    Type: Application
    Filed: March 17, 2011
    Publication date: July 7, 2011
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Mitsuru OKUNO, Akemi Moniwa
  • Patent number: 7935462
    Abstract: A method of forming a pattern including a first pattern portion having a first minimum dimension and a second pattern portion having a second minimum dimension includes a first exposure step of performing exposure using a Levenson-type mask and a second exposure step of performing exposure using a half tone-type mask. When second minimum dimension is 1.3 time or more than the first minimum dimension, the exposure amount of the second exposure step is set to be equal to or smaller than the exposure amount of the first exposure step.
    Type: Grant
    Filed: February 3, 2010
    Date of Patent: May 3, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Mitsuru Okuno, Akemi Moniwa
  • Publication number: 20100136487
    Abstract: A method of forming a pattern including a first pattern portion having a first minimum dimension and a second pattern portion having a second minimum dimension includes a first exposure step of performing exposure using a Levenson-type mask and a second exposure step of performing exposure using a half tone-type mask. When second minimum dimension is 1.3 time or more than the first minimum dimension, the exposure amount of the second exposure step is set to be equal to or smaller than the exposure amount of the first exposure step.
    Type: Application
    Filed: February 3, 2010
    Publication date: June 3, 2010
    Applicant: RENESAS TECHNOLOGY CORP.
    Inventors: Mitsuru OKUNO, Akemi Moniwa
  • Patent number: 7682760
    Abstract: A method of forming a pattern including a first pattern portion having a first minimum dimension and a second pattern portion having a second minimum dimension includes a first exposure step of performing exposure using a Levenson-type mask and a second exposure step of performing exposure using a half tone-type mask. When second minimum dimension is 1.3 time or more than the first minimum dimension, the exposure amount of the second exposure step is set to be equal to or smaller than the exposure amount of the first exposure step.
    Type: Grant
    Filed: December 13, 2006
    Date of Patent: March 23, 2010
    Assignee: Renesas Technology Corp.
    Inventors: Mitsuru Okuno, Akemi Moniwa
  • Publication number: 20090239159
    Abstract: A photomask is disclosed which can suppress deterioration of the depth of focus even in the case where main features are arranged randomly. Sub-features are replaced by a quadrangular sub-feature located inside an external quadrangle which includes as part of its outer periphery the outermost portions of the original sub-features. The sub-feature after the replacement is preferably in a square shape and the length of one side thereof is determined in accordance with the length of the associated external quadrangle. A central position of the sub-feature after the replacement is preferably coincident with the center of the external quadrangle or the center of gravity of the region which includes the original sub-features.
    Type: Application
    Filed: February 27, 2009
    Publication date: September 24, 2009
    Inventors: Ayumi MINAMIDE, Akemi Moniwa, Junjiro Sakai, Manabu Ishibashi
  • Publication number: 20090061362
    Abstract: To provide a semiconductor device manufacturing method using double patterning, in which layout patterns are distributed avoiding yield reduction factors. The semiconductor device manufacturing method includes the steps of: preparing a plurality of masks for use in the double patterning; and performing the double patterning using the plurality of masks. The step of preparing the plurality of masks includes a step of distributing a group of layout patterns to the plurality of masks, in accordance with characteristics of exposure steps respectively using the plurality of masks, and in consideration of size of the layout patterns.
    Type: Application
    Filed: August 28, 2008
    Publication date: March 5, 2009
    Inventors: Hironobu TAOKA, Akemi MONIWA, Junjiro SAKAI
  • Publication number: 20070141480
    Abstract: A method of forming a pattern including a first pattern portion having a first minimum dimension and a second pattern portion having a second minimum dimension includes a first exposure step of performing exposure using a Levenson-type mask and a second exposure step of performing exposure using a half tone-type mask. When second minimum dimension is 1.3 time or more than the first minimum dimension, the exposure amount of the second exposure step is set to be equal to or smaller than the exposure amount of the first exposure step.
    Type: Application
    Filed: December 13, 2006
    Publication date: June 21, 2007
    Inventors: Mitsuru Okuno, Akemi Moniwa
  • Patent number: 6964832
    Abstract: A method is provided for solving a problem that the fine processing property is degraded by an increase of a current applied to complementarily divided masks in an electron beam projection process. In the method, the complementarily divided masks used for electron projection are used whereby one mask is used for patterns requiring high dimensional accuracy and another is used for other patterns. Consequently, it is possible to lower the current applied to the patterns requiring high dimensional accuracy to realize high printing accuracy. In addition, the highly accurate patterns can be formed at a high throughput.
    Type: Grant
    Filed: February 27, 2003
    Date of Patent: November 15, 2005
    Assignee: Hitachi, Ltd.
    Inventors: Akemi Moniwa, Jiro Yamamoto, Fumio Murai, Hiroshi Fukuda
  • Patent number: 6787459
    Abstract: There is provided a method of fabricating a semiconductor device whereby fine patterns are formed with high dimensional accuracy by means of multiple exposures, using a phase shift mask and a trim mask. Phases are periodically assigned to shifter patterns within a given range from patterns generated with the phase shift mask, respectively.
    Type: Grant
    Filed: November 15, 2002
    Date of Patent: September 7, 2004
    Assignee: Renesas Technology Corp.
    Inventors: Akemi Moniwa, Takuya Hagiwara, Keitaro Katabuchi, Hiroshi Fukuda, Mineko Adachi
  • Publication number: 20030228758
    Abstract: Disclosed herewith is a method for solving a conventional problem that the fine processing property is degraded by an increase of a current applied to complementarily divided masks in an electron beam projection process.
    Type: Application
    Filed: February 27, 2003
    Publication date: December 11, 2003
    Inventors: Akemi Moniwa, Jiro Yamamoto, Fumio Murai, Hiroshi Fukuda