Abstract: In described examples, a device includes a pulse width modulation (PWM) control circuit and a burst mode logic circuit. An input of the burst mode logic circuit is coupled to an output of the PWM control circuit. The burst mode logic circuit is configured to receive a feedback signal from a secondary side of a power conversion circuit. The burst mode logic circuit is configured to suppress a sleep period of a burst mode in response to a magnitude of the feedback signal exceeding a nominal load threshold voltage. The PWM control circuit continues to operate in the burst mode while the burst mode logic circuit suppresses the sleep period.