Abstract: In an output circuit of a semiconductor device, an output buffer circuit includes a P-channel MOS transistor and a resistor connected in series between a line of a power supply potential and an output node. Current driving capability of the output buffer circuit is adjusted by making the P-channel MOS transistor nonconductive when a fuse is not blown, and making P-channel MOS transistor conductive when the fuse is blown. Thus, desired circuit characteristics can be obtained. Further, measures against electrostatic discharge can be taken by providing the resistor between a drain of the P-channel MOS transistor and the output node.

Abstract: A read and write control circuit receives (m×n))-bit data output m-bit parallel from a D flip flop, and a q-bit data selection signal such that the output data from the D flip flop is written to memory circuits in units of integral multiples of (x+1) bits in a total of 2q operations, in accordance with a binary value indicated by the data selection signal, where m, n, x and q indicates positive integers (x+1)>m and n>2q, where m, n, x and 1 indicate positive integers and (x+1)>m and n>2q. The data written to the memory circuits is read out in units of integral multiples of (x+1) bits in a total of 2q operations.

Abstract: A read and write control circuit receives (m×n)−bit data output m−bit parallel from a D flip flop, and a q−bit data selection signal such that the output data from the D flip flop is written to memory circuits in units of integral multiples of (x+1) bits in a total of 2q operations, in accordance with a binary value indicated by the data selection signal, where m, n, x and q indicates positive integers (x+1)>m and n>2q, where m, n, x and 1 indicate positive integers and (x+1)>m and n>2q. The data written to the memory circuits is read out in units of integral multiples of (x+1) bits in a total of 2q operations.