Abstract: An integrated circuit for video/audio processing in which design resources obtained by development of video/audio devices can also be used for other types of video/audio devices. The integrated circuit includes a microcomputer that includes a CPU, a stream input/output for inputting/outputting a video and audio stream to and from an external device, a media processor that executes the media processing including at least one of compressing and decompressing the video and audio stream inputted to the stream input/output, an AV input/output that converts the video and audio stream subjected to the media processing by the media processor into video and audio signals and outputting these signals to the external device. A memory interface controls a data transfer between the microcomputer, the stream input/output, the media processor and the AV input/output and an external memory.

Abstract: An integrated circuit for video/audio processing in which design resources obtained by development of video/audio devices can also be used for other types of video/audio devices. The integrated circuit includes a microcomputer that includes a CPU, a stream input/output for inputting/outputting a video and audio stream to and from an external device, a media processor that executes the media processing including at least one of compressing and decompressing the video and audio stream inputted to the stream input/output, an AV input/output that converts the video and audio stream subjected to the media processing by the media processor into video and audio signals and outputting these signals to the external device. A memory interface controls a data transfer between the microcomputer, the stream input/output, the media processor and the AV input/output and an external memory.

Abstract: A 3D image processing apparatus includes: L and R graphic decoders which decode coded stream data to generate left-eye and right-eye image data; an image output control unit which outputs the generated image data; and a control unit which, when a decoding error occurs in generating one of the image data, and a successful decode occurs in generating the other of the image data, (i) shifts, by a preset offset, a pixel position of the other of the image data, to generate pseudo image data as the one of the image data, and (ii) outputs the pseudo image data to an image output control unit, wherein the image output control unit outputs the other of the image data and the pseudo image data, when the decoding error occurs in generating the one of the image data and the successful decode occurs in generating the other of the image data.

Abstract: An integrated circuit for video/audio processing in which design resources obtained by development of video/audio devices can also be used for other types of video/audio devices. The integrated circuit includes a microcomputer that includes a CPU, a stream input/output for inputting/outputting a video and audio stream to and from an external device, a media processor that executes the media processing including at least one compressing and decompressing the video and audio stream inputted to the stream input/output, an AV input/output that converts the video and audio stream subjected to the media processing by the media processor into video and audio signals and outputting these signals to the external device. A memory interface controls a data transfer between the microcomputer, the stream input/output, the media processor and the AV input/output and an external memory.

Abstract: A 3D image processing apparatus which generates a left-eye image signal and a right-eye image signal for stereoscopic vision, including: a blend ratio determination unit which determines, for each of a plurality of objects which are displayed in layers, a blend ratio that is used in synthesizing images, at each pixel position of the left-eye image signal and the right-eye image signal, so that the blend ratio increases as an offset that is an amount of shift in position between a left-eye image and a right-eye image of the object increases; and a synthesis unit which synthesizes, based on the blend ratio determined by the blend ratio determination unit, pixel values of the objects at each pixel position of the left-eye image signal and the right-eye image signal, to generate the left-eye image signal and the right-eye image signal.

Abstract: A 3D image processing apparatus includes: L and R graphic decoders which decode coded stream data to generate left-eye and right-eye image data; an image output control unit which outputs the generated image data; and a control unit which, when a decoding error occurs in generating one of the image data, and a successful decode occurs in generating the other of the image data, (i) shifts, by a preset offset, a pixel position of the other of the image data, to generate pseudo image data as the one of the image data, and (ii) outputs the pseudo image data to an image output control unit, wherein the image output control unit outputs the other of the image data and the pseudo image data, when the decoding error occurs in generating the one of the image data and the successful decode occurs in generating the other of the image data.

Abstract: A signal processor includes a picture input section for receiving a video bit stream, a video decoding section for decoding the video bit stream, a picture display section for outputting decoded data from the video decoding section, a digital image input section for receiving digital image data, a digital image display section for outputting the digital image data, a blending section for generating a picture signal from the digital image display section and the picture display section, an audio input section for receiving the digital audio data and the audio bit stream, an audio decoding section for decoding audio data and the audio bit stream, an audio output section for adding an audio signal to data from the audio decoding section to generate a signal and outputting the generated signal, and a synchronizing section for synchronizing respective outputs of the blending section and the audio output section.

Abstract: In the case of performing NR (noise reduction) and scaling on video signals, the NR buffer 104 is formed by, for example, five line memories. An NR section 103 and a scaling section 105 are controlled by a control section 108. The control section 108 controls the NR section 103 and the scaling section 105 such that video signals subjected to noise reduction by the NR section 103 and corresponding to one line are output from the NR section 103 to an arbitrary one of the line memories of the NR buffer 104 and video signals corresponding to a plurality of lines and stored in the line memories of the NR buffer 104 except for the line memory to which the video signals corresponding to one line have been input from the NR section 103 are input from the NR buffer 104 to the scaling section 105. Accordingly, noise components of video signals are reduced with the memory size reduced.

Abstract: The present invention provides an integrated circuit for video/audio processing in which the design resources obtained by the development of video/audio devices can be used also for other types of video/audio devices. The integrated circuit comprises a microcomputer block 2 including a CPU, a stream I/O block 4 for inputting/outputting video and audio streams to and from an external device, a media processing block 3 for executing the media processing including at least one of the compression and decompression of the video and audio streams, etc. inputted to the stream I/O block 4, an AV IO block 5 for converting the video and audio streams subjected to the media processing in the media processing block 3 into video and audio signals and outputting these signals to the external device, etc, and a memory IF block 6 for controlling the data transfer between the microcomputer block 2, the stream I/C block 4, the media processing block 3 and the AV IO block 5 and an external memory 9.

Abstract: The multichannel video processing unit of the invention includes: a decoding section for sequentially selecting a bit stream from a plurality of bit streams each including encoded data of an image of one channel, decoding the selected bit stream by one frame each, and outputting decoded data; a vertical filtering section for sequentially selecting a channel from a plurality of channels corresponding to the decoded images, performing vertical processing for the decoded data corresponding to the selected channel, and outputting vertically-processed data; a horizontal filtering section for sequentially selecting a channel according to the position at which the image is to be displayed, performing horizontal processing for the vertically-processed data corresponding to the selected channel, and outputting horizontally-processed data; and an output processing section for generating a video signal for display of images of a plurality of channels by synthesizing the horizontally-processed data and outputting the gen

Abstract: A signal processor includes a picture input section for receiving a video bit stream, a video decoding section for decoding the video bit stream, a picture display section for outputting decoded data from the video decoding section, a digital image input section for receiving digital image data, a digital image display section for outputting the digital image data, a blending section for generating a picture signal from the digital image display section and the picture display section, an audio input section for receiving the digital audio data and the audio bit stream, an audio decoding section for decoding audio data and the audio bit stream, an audio output section for adding an audio signal to data from the audio decoding section to generate a signal and outputting the generated signal, and a synchronizing section for synchronizing respective outputs of the blending section and the audio output section.

Abstract: The multichannel video processing unit of the invention includes: a decoding section for sequentially selecting a bit stream from a plurality of bit streams each including encoded data of an image of one channel, decoding the selected bit stream by one frame each, and outputting decoded data; a vertical filtering section for sequentially selecting a channel from a plurality of channels corresponding to the decoded images, performing vertical processing for the decoded data corresponding to the selected channel, and outputting vertically-processed data; a horizontal filtering section for sequentially selecting a channel according to the position at which the image is to be displayed, performing horizontal processing for the vertically-processed data corresponding to the selected channel, and outputting horizontally-processed data; and an output processing section for generating a video signal for display of images of a plurality of channels by synthesizing the horizontally-processed data and outputting the gen