Patents by Inventor Akihide Ishihara

Akihide Ishihara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12232268
    Abstract: A wiring substrate includes an insulating layer, and a build-up part formed on the insulating layer and including an interlayer insulating layer and a conductor layer. The build-up part has a cavity penetrating through the build-up part such that the cavity is formed to accommodate an electronic component and has an inner wall and a bottom surface having a groove and that the groove is extending entirely in an outer edge part of the bottom surface and formed continuously from the inner wall surface of the cavity.
    Type: Grant
    Filed: February 25, 2022
    Date of Patent: February 18, 2025
    Assignee: IBIDEN CO., LTD.
    Inventors: Hirotaka Taniguchi, Akihide Ishihara
  • Publication number: 20220330432
    Abstract: A wiring substrate includes an insulating layer, and a build-up part formed on the insulating layer and including an interlayer insulating layer and a conductor layer. The build-up part has a cavity penetrating through the build-up part such that the cavity is formed to accommodate an electronic component and has an inner wall and a bottom surface having a groove and that the groove is extending entirely in an outer edge part of the bottom surface and formed continuously from the inner wall surface of the cavity.
    Type: Application
    Filed: February 25, 2022
    Publication date: October 13, 2022
    Applicant: IBIDEN CO., LTD.
    Inventors: Hirotaka TANIGUCHI, Akihide ISHIHARA
  • Patent number: 7812261
    Abstract: There are provided a multilayer printed circuit board and a testing piece for the printed circuit board, including a substrate having an inner-layer conductor circuit and one or more outer-layer conductor circuits formed on the substrate with an insulating layer laid between the substrate and outer-layer conductor circuit, wherein a strain gauge having a resistive element held tight between resin films formed from polyimide or thermoplastic resin is buried in the substrate, and electrodes electrically connected to the resistive element are exposed to outside from the resin film and are electrically connected at exposed portions thereof to a viahole. Even if a crack is caused by an impact test to take place in the insulative resin layer, the resin film layers prevent the crack from spreading and thus the resistive element forming the strain gauge will not be ruptured.
    Type: Grant
    Filed: January 17, 2005
    Date of Patent: October 12, 2010
    Assignee: Ibiden Co., Ltd.
    Inventors: Takahiro Yamashita, Hirofumi Futamura, Akihide Ishihara, Takayoshi Katahira
  • Publication number: 20070190846
    Abstract: There are provided a multilayer printed circuit board and a testing piece for the printed circuit board, including a substrate having an inner-layer conductor circuit and one or more outer-layer conductor circuits formed on the substrate with an insulating layer laid between the substrate and outer-layer conductor circuit, wherein a strain gauge having a resistive element held tight between resin films formed from polyimide or thermoplastic resin is buried in the substrate, and electrodes electrically connected to the resistive element are exposed to outside from the resin film and are electrically connected at exposed portions thereof to a viahole. Even if a crack is caused by an impact test to take place in the insulative resin layer, the resin film layers prevent the crack from spreading and thus the resistive element forming the strain gauge will not be ruptured.
    Type: Application
    Filed: January 17, 2005
    Publication date: August 16, 2007
    Applicant: IBIDEN CO., LTD
    Inventors: Takahiro Yamashita, Hirofumi Futamura, Akihide Ishihara, Takayoshi Katahira