Patents by Inventor Akihide Okuda

Akihide Okuda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4882725
    Abstract: A multiplex transmission method using especially a vestigial-sideband amplitude-modulated carrier modulated by a video signal. The method includes modulating a carrier having a quadrature phase with respect to an amplitude-modulated carrier by a multiplex-transmitted signal such as a digital-coded signal with a lower level as compared with the amplitude-modulated carrier, suppressing signal components of a signal obtained by modulating the carrier by a multiplex-transmitted signal, which is located near the carrier frequency, combining the result with the amplitude-modulated carrier, and thereafter transmitting the combined signal.
    Type: Grant
    Filed: January 29, 1988
    Date of Patent: November 21, 1989
    Assignees: Hitachi, Ltd., Hitachi Video Engineering, Incorporated
    Inventors: Tsutomu Noda, Takatoshi Shirosugi, Nobutaka Hotta, Akihide Okuda
  • Patent number: 4775888
    Abstract: A motion detector for a chrominance signal which is used with a TV receiver equipped with a video signal motion detector. This motion detector for a chrominance signal has a delay element for delaying the chrominance signal of a video signal by 1 frame period, a subtracter for subtracting the output signal of the delay element from the input signal thereof, an absolute value conversion circuit to which the output signal from the subtracter is inputted, and a smoother circuit to which the output signal from the absolute value conversion circuit is supplied. If the chrominance signal of video signals on two consecutive frames are the same, the output signal of the subtracter becomes zero. If the chrominance signals of video signals on two consecutive frames are different, the output signal of the subtracter takes a positive or negative value. The negative value signal is converted into a positive value signal by the absolute value conversion circuit.
    Type: Grant
    Filed: January 13, 1988
    Date of Patent: October 4, 1988
    Assignee: Hitachi, Ltd.
    Inventors: Isao Nakagawa, Masahiko Achiha, Masato Sugiyama, Kenji Katsumata, Toshinori Murata, Shigeru Hirahata, Akihide Okuda
  • Patent number: 4754322
    Abstract: The present invention is for separating luminance signal Y and color difference signal C from the composite color television signal and includes a frame memory for storing the composite color television signal, a motion detector for detecting motion of a picture image on the basis of the signal read out from the frame memory, a correlation detector for detecting the magnitude of vertical correlation of pictures on the basis of the signal read out from the frame memory, a vertical-axis filter for performing YC-signal separation through a filtering operation in the vertical-axis direction, a time-axis filter for performing a filtering operation in the time-axis direction, a two-dimensional filter for performing YC-signal separation through a filtering operation in both the horizontal and vertical directions, and a mixer for mixing the outputs of the three filters in accordance with the magnitude of motion and the magnitude of vertical correlation.
    Type: Grant
    Filed: September 17, 1986
    Date of Patent: June 28, 1988
    Assignee: Hitachi, Ltd.
    Inventors: Akihide Okuda, Isao Nakagawa, Masato Sugiyama, Kenji Katsumata
  • Patent number: 4736252
    Abstract: A motion detector for a chrominance signal which is used with a TV receiver equipped with a video signal motion detector. This motion detector for a chrominance signal has a delay element for delaying the chrominance signal of a video signal by 1 frame period, a subtractor for subtracting the output signal of the delay element from the input signal thereof, an absolute value conversion circuit to which the output signal from the subtractor is inputted, and a smoother circuit to which the output signal from the absolute value conversion circuit is supplied. If the chrominance signals of video signals on two consecutive frames are the same, the output signal of the subtractor becomes zero. If the chrominance signals of video signals on two consecutive frames are different, the output signal of the substractor takes a positive or negative value. The negative value signal is converted into a positive value signal by the absolute value conversion circuit.
    Type: Grant
    Filed: November 20, 1986
    Date of Patent: April 5, 1988
    Assignee: Hitachi, Ltd.
    Inventors: Isao Nakagawa, Masahiko Achiha, Masato Sugiyama, Kenji Katsumata, Toshinori Murata, Shigeru Hirahata, Akihide Okuda
  • Patent number: 4733297
    Abstract: A video signal processing circuit of motion adaptive type includes a circuit for identifying motion of a picture in a video signal on the basis of a difference signal between at least a line signal appearing in an M-th field and a corresponding line signal appearing in an (M-1)th field so that, when a scanning line produced on the basis of the video signal is interpolated between scanning lines of the video signal to improve the picture quality, a signal for interpolating said scanning line is produced in a different manner depending on whether a portion of the video signal to the displayed is a still picture or a moving picture.
    Type: Grant
    Filed: April 9, 1987
    Date of Patent: March 22, 1988
    Assignee: Hitachi Ltd. & Hitachi Video Eng.
    Inventors: Kenji Katsumata, Masato Sugiyama, Akihide Okuda, Shigeru Hirahata, Isao Nakagawa, Sunao Suzuki
  • Patent number: 4577231
    Abstract: Disclosed is a two-dimensionally arrayed solid-state imaging device for a television camera having a photodiode array arranged at a photo-sensing section and a readout horizontal register constructed by a charge transfer device (CTD) such as a BCD, CCD or BBD. An inverter circuit is provided for each of the vertical signal lines. An input of the inverter circuit is connected to a vertical signal line drain of at least one transfer transistor arranged between the vertical signal line and the CTD, and an output of the inverter circuit is connected to a gate of the transfer transistor. Transfer efficiency is improved by the insertion of the inverter circuit and fixed pattern noise is substantially reduced by supplying bias currents.
    Type: Grant
    Filed: March 17, 1983
    Date of Patent: March 18, 1986
    Assignee: Hitachi, Ltd.
    Inventors: Shinya Ohba, Haruhisa Ando, Masaaki Nakai, Toshifumi Ozaki, Koichi Seki, Kenji Takahashi, Toshiyuki Akiyama, Iwao Takemoto, Takuya Imaide, Akihide Okuda, Masaharu Kubo
  • Patent number: 4556911
    Abstract: A method and apparatus for increasing the sensitivity of a charge priming type solid state camera having means for sweeping out undesired excess charges generated by a vertical smear from vertical signal lines. When the scene illumination is higher than an appropriate value, the sweep out of the undesired excess charges is executed within each horizontal blanking period in order to reduce the vertical smear. When the scene illumination becomes lower than the appropriate value, the sweep out thereof is stopped in order to increase the sensitivity. Alternatively, when the scene illumination is lower than the appropriate value but the quantity of the vertical smear is larger than a fixed value, the sweep out thereof is executed within each horizontal blanking period in order to suppress vertical smear which is at an unacceptably high level even though the illumination level is relatively low.
    Type: Grant
    Filed: March 23, 1984
    Date of Patent: December 3, 1985
    Assignee: Hitachi, Ltd.
    Inventors: Takuya Imaide, Michio Masuda, Akihide Okuda, Ryuji Nishimura