Patents by Inventor Akihide TAKAHASHI
Akihide TAKAHASHI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11718229Abstract: The image processing device acquires feature quantities (maximum value, minimum value, average value, histogram, etc.) of the entire area (GA) of the image and feature quantities of each local area (LA) of the image from the input image, and calculates a plurality of modulation gain values (gamma correction curves) for GA and each LA. Furthermore, the image processing device determines the correction intensity for each LA from the feature quantity of the GA and the feature quantity of each LA, and creates the LA correction intensity map. Finally, the image processing device finally applies the result of combining a plurality of modulation gain values based on the LA correction intensity map to the input image.Type: GrantFiled: October 21, 2020Date of Patent: August 8, 2023Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Mitsuhiro Kimura, Akihide Takahashi
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Patent number: 11440466Abstract: A semiconductor device has a position estimation part calculating an estimated position of a mobile at a scheduled time to project a message image, based on movement information of the mobile, a reference image signal output part deciding a reference area being an area to project a reference image, based on a relative positional relation between the mobile at the estimated position and the projection area, and outputting a reference image signal being a signal of the reference image, a test image signal acquisition part acquiring a test image signal being a signal of an image obtained by imaging the reference area with the reference image projected thereon, and an image adjustment part adjusting the message image signal, based on the reference image signal and the test image signal.Type: GrantFiled: June 7, 2019Date of Patent: September 13, 2022Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Hirofumi Kawaguchi, Koji Yasuda, Akihide Takahashi
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Patent number: 11145093Abstract: A semiconductor device includes an image acquisition circuit which acquires a plurality of captured image data obtained by capturing a plurality of images, an estimation source image generation circuit which cancels effects of initial color adjustment processing on each captured image data to generate image data of a plurality of estimation source images, a readjustment circuit which divides each estimation source image into a plurality of processing regions to perform color balance readjustment processing for each processing region, and an image synthesis circuit which synthesizes the image data of the plurality of estimation source images so that overlapping regions included in the estimation source images overlap each other to generate image data of a synthesized image.Type: GrantFiled: November 1, 2019Date of Patent: October 12, 2021Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Hirofumi Kawaguchi, Akihide Takahashi
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Patent number: 11094037Abstract: A semiconductor device includes an image data acquisition circuit which acquires a plurality of first captured image data and a plurality of second captured image data at a first time and a second time, an adjustment region determination circuit which detects a target object from the plurality of first captured image data, and determines an adjustment region by estimating a position of the target object at the second time, a color adjustment circuit configured to determine a color adjustment gain based on the adjustment region, and perform color balance adjustment processing on the plurality of second captured image data based on the color adjustment gain, and an image synthesis circuit configured to synthesize the plurality of second captured image data so that overlapping regions included in a plurality of images of the plurality of second captured image data overlap each other.Type: GrantFiled: November 4, 2019Date of Patent: August 17, 2021Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Hirofumi Kawaguchi, Akihide Takahashi
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Publication number: 20210150250Abstract: The image processing device acquires feature quantities (maximum value, minimum value, average value, histogram, etc.) of the entire area (GA) of the image and feature quantities of each. local area (LA) of the image from the input image, and calculates a plurality of modulation gain values (gamma correction curves) for GA and each LA. Furthermore, the image processing device determines the correction intensity for each LA from the feature quantity of the GA and the feature quantity of each LA, and creates the LA correction intensity map. Finally, the image processing device finally applies the result of combining a plurality of modulation gain. values based. on the LA correction intensity map to the input image.Type: ApplicationFiled: October 21, 2020Publication date: May 20, 2021Inventors: Mitsuhiro KIMURA, Akihide TAKAHASHI
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Patent number: 10766405Abstract: To provide a semiconductor device which suppresses a message image projected by a mobile from varying from a desired position. A semiconductor device has a first area decision part which decides a first area onto which a message image is projected, based on movement information of a mobile. The semiconductor device has a delay period calculation part which calculates a delay period being a period from a first time for projecting the message image onto the first area to a second time when the message image is projectable. Also, the semiconductor device has a second area decision part which adjusts the first area, based on the delay period to decide a second area. Further, the semiconductor device has an image signal conversion part which converts a message image signal according to the second area.Type: GrantFiled: June 7, 2019Date of Patent: September 8, 2020Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Koji Yasuda, Hirofumi Kawaguchi, Akihide Takahashi
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Publication number: 20200202488Abstract: A semiconductor device includes an image data acquisition circuit which acquires a plurality of first captured image data and a plurality of second captured image data at a first time and a second time, an adjustment region determination circuit which detects a target object from the plurality of first captured image data, and determines an adjustment region by estimating a position of the target object at the second time, a color adjustment circuit configured to determine a color adjustment gain based on the adjustment region, and perform color balance adjustment processing on the plurality of second captured image data based on the color adjustment gain, and an image synthesis circuit configured to synthesize the plurality of second captured image data so that overlapping regions included in a plurality of images of the plurality of second captured image data overlap each other.Type: ApplicationFiled: November 4, 2019Publication date: June 25, 2020Inventors: Hirofumi KAWAGUCHI, Akihide TAKAHASHI
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Publication number: 20200202581Abstract: A semiconductor device includes an image acquisition circuit which acquires a plurality of captured image data obtained by capturing a plurality of images, an estimation source image generation circuit which cancels effects of initial color adjustment processing on each captured image data to generate image data of a plurality of estimation source images, a readjustment circuit which divides each estimation source image into a plurality of processing regions to perform color balance readjustment processing for each processing region, and an image synthesis circuit which synthesizes the image data of the plurality of estimation source images so that overlapping regions included in the estimation source images overlap each other to generate image data of a synthesized image.Type: ApplicationFiled: November 1, 2019Publication date: June 25, 2020Inventors: Hirofumi KAWAGUCHI, Akihide TAKAHASHI
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Publication number: 20190389368Abstract: To provide a semiconductor device which suppresses a message image projected by a mobile from varying from a desired position. A semiconductor device has a first area decision part which decides a first area onto which a message image is projected, based on movement information of a mobile. The semiconductor device has a delay period calculation part which calculates a delay period being a period from a first time for projecting the message image onto the first area to a second time when the message image is projectable. Also, the semiconductor device has a second area decision part which adjusts the first area, based on the delay period to decide a second area. Further, the semiconductor device has an image signal conversion part which converts a message image signal according to the second area.Type: ApplicationFiled: June 7, 2019Publication date: December 26, 2019Inventors: Koji YASUDA, Hirofumi Kawaguchi, Akihide Takahashi
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Publication number: 20190389370Abstract: A semiconductor device has a position estimation part calculating an estimated position of a mobile at a scheduled time to project a message image, based on movement information of the mobile, a reference image signal output part deciding a reference area being an area to project a reference image, based on a relative positional relation between the mobile at the estimated position and the projection area, and outputting a reference image signal being a signal of the reference image, a test image signal acquisition part acquiring a test image signal being a signal of an image obtained by imaging the reference area with the reference image projected thereon, and an image adjustment part adjusting the message image signal, based on the reference image signal and the test image signal.Type: ApplicationFiled: June 7, 2019Publication date: December 26, 2019Inventors: Hirofumi KAWAGUCHI, Koji YASUDA, Akihide TAKAHASHI
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Patent number: 9484296Abstract: At least one via level dielectric layer and at least one line level dielectric layer are sequentially formed over an array of device structures. Conductive line structures are formed within the at least one line level dielectric layer. A mask layer is applied over the conductive line structures, and is lithographically patterned to form opening therein. Portions of the conductive line structures are removed from underneath the openings in the patterned mask layer to form via cavities. The via cavities are vertically extended through the at least one via level dielectric layer employing a combination of the mask layer and the at least one line level dielectric layer as an etch mask. At least one conductive material can be deposited in the via cavities to form conductive via structures, which, in conjunction with the conductive line structures, constitute integrated line and via structures.Type: GrantFiled: February 12, 2015Date of Patent: November 1, 2016Assignee: SANDISK TECHNOLOGIES LLCInventors: Akihide Takahashi, Ryoichi Honma
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Publication number: 20160240476Abstract: At least one via level dielectric layer and at least one line level dielectric layer are sequentially formed over an array of device structures. Conductive line structures are formed within the at least one line level dielectric layer. A mask layer is applied over the conductive line structures, and is lithographically patterned to form opening therein. Portions of the conductive line structures are removed from underneath the openings in the patterned mask layer to form via cavities. The via cavities are vertically extended through the at least one via level dielectric layer employing a combination of the mask layer and the at least one line level dielectric layer as an etch mask. At least one conductive material can be deposited in the via cavities to form conductive via structures, which, in conjunction with the conductive line structures, constitute integrated line and via structures.Type: ApplicationFiled: February 12, 2015Publication date: August 18, 2016Inventors: Akihide TAKAHASHI, Ryoichi HONMA