Patents by Inventor Akihiko Ando

Akihiko Ando has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230088435
    Abstract: According to one embodiment, a method for generating a droplet recipe used in imprint lithography includes acquiring feature data for a pattern shape that has been formed on a template. The feature data is acquired by measuring the pattern shape of a pattern that has been formed on the template. A dispensing amount for resin to be dispensed on a substrate for filling of the pattern of the template during imprinting of the pattern of the template on the substrate is calculated, based on the acquired feature data. A dispensing amount for resin corresponding to a target thickness of a residual film formed on the substrate during the imprinting of the pattern of the template on the substrate is also calculated. A droplet recipe for dispensing of resin during imprinting of the pattern of the template is then generated based on the calculated dispensing amounts.
    Type: Application
    Filed: February 28, 2022
    Publication date: March 23, 2023
    Inventors: Ryo KOBAYASHI, Akihiko Ando
  • Publication number: 20210302830
    Abstract: A method of manufacturing a template, includes: covering a part of a first region of a substrate; processing another part of the first region to form a first pattern including a protrusion; covering the first region; and processing at least part of a second region of the substrate to form a second pattern including a depression.
    Type: Application
    Filed: September 10, 2020
    Publication date: September 30, 2021
    Applicant: Kioxia Corporation
    Inventors: Kosuke TAKAI, Kazuhiro TAKAHATA, Akihiko ANDO
  • Patent number: 7640530
    Abstract: A mask inspection system 10 inspects an inspection object pattern while comparing an inspection object data obtained in such a way as to image the inspection object pattern with a reference pattern data. The mask inspection system 10 is provided with an inspection information preparing part 12 producing inspection algorithm and inspection sensitivity to the reference pattern data based on wafer simulation, a converting part 13 generating a reference graphic data with inspection information while adding the inspection information to the reference graphic data, and a defect judging part 16 judges propriety of an inspection object pattern data while comparing reference graphic data with an inspection object data in every pixel based on the inspection information added to the reference graphic data with inspection information.
    Type: Grant
    Filed: December 27, 2004
    Date of Patent: December 29, 2009
    Assignee: NEC Electronics Corporation
    Inventor: Akihiko Ando
  • Publication number: 20050142455
    Abstract: A mask inspection system 10 inspects an inspection object pattern while comparing an inspection object data obtained in such a way as to image the inspection object pattern with a reference pattern data. The mask inspection system 10 is provided with an inspection information preparing part 12 producing inspection algorithm and inspection sensitivity to the reference pattern data based on wafer simulation, a converting part 13 generating a reference graphic data with inspection information while adding the inspection information to the reference graphic data, and a defect judging part 16 judges propriety of an inspection object pattern data while comparing reference graphic data with an inspection object data in every pixel based on the inspection information added to the reference graphic data with inspection information.
    Type: Application
    Filed: December 27, 2004
    Publication date: June 30, 2005
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Akihiko Ando
  • Patent number: 6842245
    Abstract: A pattern test device has a reference data generator for generating reference pattern data and setting a first sub-area or a second sub-area in a mask area depending on the accuracy for the pattern test. A threshold selecting section selects first or second threshold depending on the test location residing in the first sub-area or second sub-area, whereby the judgement section judges presence or absence of a defect in the mask area while using the first or second threshold to compare therewith difference data between the test pattern data and the reference pattern data.
    Type: Grant
    Filed: January 16, 2003
    Date of Patent: January 11, 2005
    Assignee: NEC Electronics Corporation
    Inventor: Akihiko Ando
  • Publication number: 20030137665
    Abstract: A pattern test device has a reference data generator for generating reference pattern data and setting a first sub-area or a second sub-area in a mask area depending on the accuracy for the pattern test- A threshold selecting section selects first or second threshold depending on the test location residing in the first sub-area or second sub-area, whereby the judgement section judges presence or absence of a defect in the mask area while using the first or second threshold to compare therewith difference data between the test pattern data and the reference pattern data.
    Type: Application
    Filed: January 16, 2003
    Publication date: July 24, 2003
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Akihiko Ando
  • Patent number: 6522122
    Abstract: A signal to be measured is waveform-formatted to a square waveform that retains the frequency, duty ratio and jitter component of the original signal, and the leading (or trailing) edge of the waveform-formatted output is sampled by a sampling clock of a frequency slightly different from 1/N of the frequency fM of the signal to be measured. The samples are converted by an A/D converter to digital data Vn(t), which is stored in a memory. The difference between the stored digital data Vn(t) and the rise-up characteristic line V′(t) is calculated to detect jitter J′n(t).
    Type: Grant
    Filed: January 29, 2001
    Date of Patent: February 18, 2003
    Assignee: Advantest Corporation
    Inventors: Toshifumi Watanabe, Akihiko Ando, Yuichi Miyaji
  • Publication number: 20010012320
    Abstract: A signal to be measured is waveform-formatted to a square waveform that retains the frequency, duty ratio and jitter component of the original signal, and the leading (or trailing) edge of the waveform-formatted output is sampled by a sampling clock of a frequency slightly different from 1/N of the frequency fM of the signal to be measured. The samples are converted by an A/D converter to digital data Vn(t), which is stored in a memory. The difference between the stored digital data Vn(t) and the rise-up characteristic line V′(t) is calculated to detect jitter J′n(t).
    Type: Application
    Filed: January 29, 2001
    Publication date: August 9, 2001
    Inventors: Toshifumi Watanabe, Akihiko Ando, Yuichi Miyaji